not interrupted, and any pending attention and de
vice-end conditions in these devices are not reset.
When any of the following conditions occurs, HALTI/O causes the status portion, bit positions 32-47, of
the csw at location 64 to be replaced by a new set of
status bits. The status bits pertain to the device ad
dressed by instruction. The contents of the other fields
of the csw at location 64 are not changed. The extent
of data transfer and the conditions of termination of
the operation at the subchannel are provided in the
csw associated with the termination.
1. The device on the addressed subchannel current
ly involved in data transfer in the multiplex mode has
been signaled to terminate the operation. The csw
containsz,eros in the status field.
2. The addressed subchannel on the multiplexor
channel is working, and no burst operation is in prog
ress, but the control unit or theI/O device is executing
a type of operation or is in such a state that it cannot
accept the halt-I/o signaI. The device has not been
signaled to terminate the operation, but the subchan
nel has been set up to signal termination to the device
the next time the device requests or offers a byte of
data. The csw unit-status field contains the busy and
status-modifier bits. The channel-status field contains
zeros.
3. The channel detected an equipment malfunction
during the execution of HALTI/O. The status bits in
the csw identify the error condition. The state of the
channel and the progress of theI/O operation are un
predictable.
When the subchannel on the multiplexor channel is
shared and no burst operation is in progress, HALTI/O causes the operation to be terminated as long as the
instruction is addressed to a device on the currently
working control unit. If another device is addressed, a
malfunction has occurred, or the operator has changed
the state of the operating control unit, no device may
recognize the address. If the device appears not oper
ational during execution of HALTI/O, condition code
3 is set, and the subchannel is set up to signal ter
mination to the device the next time the device offers
or requests a byte of data.
Resulting Condition Code:
oChannel and subchannel not working
1 csw stored
2 Burst operation terminated
3 Not operationalProgram Interruptions: Privileged operation.
Programming Note
The instruction HALTI/O provides the program a
means of terminating anI/O operation before all data
specified in the operation have been transferred. It
permits the program to immediately free the selector
channel for an operation of higher priority.On the
multiplexor channel, HALTI/O provides a means of
controlling real-time operations and permits the pro
gram to terminate data transmission on a communi
cation line.
TestChannel TCH 51 9F 78 1516 1920 31
The condition code in the psw is set to indicate the
state of the addressed channeI. The state of the chan
nel is not affected, and no action is caused. The in
structionTEST CHANNEL is executed only when the CPU is in the supervisor state.
Bit positions 21-23 of the sum formed by the addi
tion of the content of register Bl and the content of
the Dl field identify the channel to which the instruc
tion applies. Bit positions 24-31 of the address are
ignored.
The instructionTEST CHANNEL inspects only the state
of the addressed channeI. It tests whether the channel
is operating in the burst mode, is aware of any out
standing interruption conditions from its devices, or
is not operationaI. When none of these conditions
exists, the available state is indicated. No device is
selected, and, on the multiplexor channel, the sub
channels are not interrogated.
Resulting Condition Code:
oChannel available
1 Interruption pending in channel
2Channel operating in burst mode
3Channel not operational
Input/Output Operations 95
vice-end conditions in these devices are not reset.
When any of the following conditions occurs, HALT
the csw at location 64 to be replaced by a new set of
status bits. The status bits pertain to the device ad
dressed by instruction. The contents of the other fields
of the csw at location 64 are not changed. The extent
of data transfer and the conditions of termination of
the operation at the subchannel are provided in the
csw associated with the termination.
1. The device on the addressed subchannel current
ly involved in data transfer in the multiplex mode has
been signaled to terminate the operation. The csw
contains
2. The addressed subchannel on the multiplexor
channel is working, and no burst operation is in prog
ress, but the control unit or the
a type of operation or is in such a state that it cannot
accept the halt-I/o signaI. The device has not been
signaled to terminate the operation, but the subchan
nel has been set up to signal termination to the device
the next time the device requests or offers a byte of
data. The csw unit-status field contains the busy and
status-modifier bits. The channel-status field contains
zeros.
3. The channel detected an equipment malfunction
during the execution of HALT
the csw identify the error condition. The state of the
channel and the progress of the
predictable.
When the subchannel on the multiplexor channel is
shared and no burst operation is in progress, HALT
instruction is addressed to a device on the currently
working control unit. If another device is addressed, a
malfunction has occurred, or the operator has changed
the state of the operating control unit, no device may
recognize the address. If the device appears not oper
ational during execution of HALT
3 is set, and the subchannel is set up to signal ter
mination to the device the next time the device offers
or requests a byte of data.
Resulting Condition Code:
o
1 csw stored
2 Burst operation terminated
3 Not operational
Programming Note
The instruction HALT
means of terminating an
specified in the operation have been transferred. It
permits the program to immediately free the selector
channel for an operation of higher priority.
multiplexor channel, HALT
controlling real-time operations and permits the pro
gram to terminate data transmission on a communi
cation line.
Test
The condition code in the psw is set to indicate the
state of the addressed channeI. The state of the chan
nel is not affected, and no action is caused. The in
struction
Bit positions 21-23 of the sum formed by the addi
tion of the content of register Bl and the content of
the Dl field identify the channel to which the instruc
tion applies. Bit positions 24-31 of the address are
ignored.
The instruction
of the addressed channeI. It tests whether the channel
is operating in the burst mode, is aware of any out
standing interruption conditions from its devices, or
is not operationaI. When none of these conditions
exists, the available state is indicated. No device is
selected, and, on the multiplexor channel, the sub
channels are not interrogated.
Resulting Condition Code:
o
1 Interruption pending in channel
2
3
Input/Output Operations 95