Appendix A: System/370 Information Control Registers
The control registers are used to maintain and manipulate
information that resides outside the PSi. There are sixteen
registers for control purposes. The control registers are not
addressable storage.
control
32-bit
part of At the time the registers are information is not checked
for exceptions, such as invalid segment-size or page-size code or an
address designating an unavailable or a protected location. The
validity of the information is checked and the errors, if any, indicated
at the time the information is used.
Figure 45 is a summary of the control register allocation and Figure
46 lists the facility associated with each control register.
Figure 47 is a description of the EC (Extended Control) PSi. 32 bits -----------------------------) I OISYSTEM CONTROL ITRANSL. CONTROLI EXTERNAL-INTERRUPTION MASKS 1----------------------------------------------------------------- 1ISEGM-TBL LENGTHI SEGMENT-TABLE-ORIGIN-ADDRESSI I 21 CHANNEL MASKS 3
4
5
6
7
8
9 PER EVENT MASKSI I 101 I 111 HARDWARE ASSIST CONTROLS MONITOR MASKS PER GR ALTERATION MASKS PER STARTING ADDRESS PER ENDING ADtRESS 1---------------------------------------------------------------- 121 I '"'l '- 1..)1 I 141 ERROR-RECOVERY CONTROL & MASKSI I 151 MCEL ADDRESS Figure 45. Control Register Allocation
Appendix A: System/370 Information 345
I IWordlBits Name of Field I o
o
o
o
o
o
o
o
o
o
o
o
o
o
o I 1 I 1 I I I 2 I I I I o
1
2
8-9 10 i1-12 16
17
18
19 20 21 24 25
26
Block-Multiplex Mode SSM Suppression TOD Clock Synchronous Ctrl.
Page Size
1
Reserved Segment size
i
Malfunction Alter Mask Emergency Signal Mask External Call Mask TOD Synchronous Check Mask Clock Comparator Mask
Processor Timer Mask Interval Timer Mask
Interrupt Key Mask
External Signal Mask 0-7 ISegment Table Length 8-25lSegment Table Address I 0-31lChannel Masks I I I I Associated with
Block-Multiplex Control
Extended Control
Attached Processing
Dynamic Addr. Translation
Dynamic Addr. Translation
Dynamic Addr. Translation
Attached processing
Attached processing
Attached processing
Attached Processing
Clock Comparator
Processor Timer
External Interruption
External Interruption
External Interruption IDynamic Addr. Translation IDynamic Addr. Translation I 11/0 Interruptions I I I I 6 0 VM Assist IHardward Assist I I 6 VM Problem State IHardware Assist I 6 2 ISK & SSK IHardware Assist I 6 3 5/360 or 5/370 instructions IHardware Assist I 6 4 Virtual SVC Interrupts IHardware Assist I 6 5 Shadow Table Fixup IHardware Assist I 6 6 CP Assist IHardware Assist I 6 7 Virtual Interval Timer IHardware Assist I 6 8-28 Real address of VM pOinter IHardware Assist
list I 8 I 16-31lMonitor Masks I I I Monitoring I I 9 I 0-3 IPER2 Event Masks IProgram-Event Rpcording IProgram-Event Recording I 9 116-311PER GR Alteration Masks I I 10 I 8-311PER Starting Address I I I , IProgra.-Event Recording I Initial Value 1
o
o 10 o 00 1
1
1
1
1
o
1
1
o ISet by CPa Value varies with the tYFe of virtual machine.
FFFFFFFF. Set to
zero on the attached
processor in
attached processor
systems Value depends
upon virtual machine Value depends
upon virtual machine Value depends
upon virtual machine Value depends
upon virtual machine Value depends
uFon virtual machine Value depends
upon virtual machine Value depends
upon virtual machine Value depends
upon virtual machine Value depends
upon virtual machine IValue depends on I upon virtual machine IValue depends upon I virtual machine. IValue depends upon I virtual machine. IThe fields not listed are unassigned. IThe initial value of unassigned register positions is unpredictable. I 11 I ,2 The initial value varies depending upon whether virtual storage is supported in the
virtual machine.
PER means program-event recording.
, I .J Figure 46. Centrol Register Assignments (Part 1 of 2)
346 IBM VM/310 System programmer's Guide
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