CHAPTER INTRODUCTION General-Purpose Design •...•••••••••••••••••••••••••••••••• 1-2
Compa t i b iii ty .••.•••.••.•.••••••••.•••••.•••••••••••••.••• 1-3
Compatibility among System/370 Models ..•..•••••••..••••. 1-3
Compatibility between System/360 and System/370 •.•.•...• 1-3
System Program ••..•..••..•.••••..•.•••••.•.••••••.••..•••• 1-4
Availability ••••••••.••..•.•••••••••••••.••.•••••••••••••• 1-4
This publication describes the IBM
System/370 architecture. The architecture of a system defines its
attributes as seen by the programmer,
that is, the conceptual structure and
functional behavior of the machine, as
distinct from the organization of the
data flow, the logical design, the phys­
ical design, and the performance of any particular implementation. Several
dissimilar machine implementations may
conform to a single architecture. When
the execution of programs on different
machine implementations produces the
results that are defined by a single
architecture, the implementations are considered to be compatible.
System/370 is a product of the experi­ ence gained in developing and using
several generations of compatible
general-purpose systems, starting with
System/360 as a base. System/370 incor­
porates a number of significant
facilities, which are described below. Dynamic address translation (OAT)
is a facility that need to assign a program to fixed
locations in real storage and thus
reduces the addressing constraints
on both control programs and prob­
lem programs, providing greater
freedom in program design. Dynamic address translation permits a more
efficient and effective utilization
of main storage. When one of the
operating systems for virtual stor­
age is used, dynamic address
translation allows the use of up to
16,777,216 bytes of virtual
storage. Two page sizes (2K and 4K
bytes) and two segment sizes (64K
and 1M bytes) are provided,
although some models offer only the
64K-byte-segment size and some
models offer only the 4K-byte-page
size. Extensions to this facility include the bit, the
use of which increases the effec­
tive size of the translation­
lookaside buffer and thus improves CPU performance, and the instruc­
tion INVALIDATE PAGE TABLE ENTRY, which improves CPU performance in a demand-paging environment. Protection facilities include a storage key which is standard on
all models. On some models this is
extended by low-address protection, the use of which increases the
protection of storage locations at
effective addresses 0 through 511,
which are vital to the control
program. Segment protection, which
is available on some models,
provides a segment-protection bit
in the segment-table entry. When
the bit is one, an attempt to store
in the segment causes a protection
exception to be recognized.
Extended real addressing, which is
an extension to dynamic address
translation, provides the CPU with
the capability of addressing up to
64M bytes of real storage. This is
accomplished by the use of bits 13
and 14 of the page-table entry,
which serve as the high-order bits
of the page-frame real address when
4K-byte pages are specified. The
larger address size applies to the
real address provided by dynamic
address translation and to the
address provided by the LOAD REAL
ADDRESS instruction.
Channel indirect data addressing, a
companion facility to dynamic
address translation, provides
assistance in translating data
addresses for I/O operations. It
permits a single channel-command
word to control the transmission of
data that spans noncontiguous areas
of main storage. In the basic form
the indirect-data-address word
contains a 24-bit address. This
becomes a 31-bit address when the
31-bit-IDAW facility is installed.
Multiprocessing provides for the
interconnection of CPUs to enhance
system availability and share data
and resources. It includes facili­ ties for shared main storage, for
programmed and special machine
signaling between CPUs, and for the
programmed reassignment of the
first 4K bytes of real storage for
each CPU. Chapter 1. Introduction 1-1
Channel-set switching permits the
collection of channels in a channel
set to be connected to any CPU in a multiprocessing configuration.
Timing facilities include a TOO clock, a clock comparator, and a CPU timer, along with an interval
timer that is also available in System/360. The TOO clock provides a measure of elapsed time suitable
for the indication of date and
time; it has a cycle of approxi­
mately 143 years and a resolution
such that the incrementing rate is
comparable to the instruction­
execution rate of the model. The
clock comparator provides for an
interruption when the TOD clock
reaches a program-specified value.
The CPU timer is a high-resolution
timer that initiates an inter­
ruption upon being decremented past
Extended-precision floating point
includes addition, subtraction, and
multiplication of floating-point
numbers with a fraction of 28 hexa­
decimal digits. Also included are instructions for rounding from
extended to long and from long to
short formats. Program-event recording provides
program interruptions on a selec­
tive basis as an aid in program
debugging. The dual-address-space (DAS) facil­ provides for the support of semiprivileged programs, which are executed in the problem state but
which, when allowed by authori­
zation controls, are also permitted
to use additional capabilities
previously available only through
the assistance of supervisor-state
programs. The capabilities include
(1) a PSW-key mask that controls
the PSW keys which can be set by
the program, (2) a second address
space, called the secondary address
space, together with an address­
space-control bit in the PSW that
permits the program to switch
between the primary and secondary
address spaces, and (3) a table­
based linkage mechanism which
permits a program with one authori­
ty to call a program with greater authority. Start-I/O-fast gueuing permits a subchannel to accept an SIOF func­
tion even when certain I/O-busy
conditions are encountered. If
accepted, the SIOF function is held
pending until the required facili­
ties are available. An SIOF function is initiated when a START I/O FAST RELEASE instruction is
executed and other necessary condi­
tions exist. Start-I/O-fast 1-2 System/370 Principles of Operation queuing may be provided for one or
more subchannels of a channel.
The suspend-and-resume facility provides a means for programmed
control of the progress of
channel-program execution. A flag
bit is provided in the channel­
command word (CCW) which indicates
that channel-program execution is
to be suspended by the channel
prior to executing the CCW. A new
bit is added to the channel-status
word which indicates that a channel
program has been suspended. A
control bit is provided in the
channel-address word (CAW) which
indicates that the suspend function
is permitted for the channel
program. An instruction, RESUME I/O, causes a suspended channel
program to be resumed. The
suspend-and-resume facility may be
provided for one or more subchan­
nels of a multiplexer channel. GENERAL-PURPOSE DESIGN System/370 is a general-purpose system
that can readily be tailored for a varl­
ety of applications. A commercial
instruction set provides the basic proc­
essing capabilities of the system. If
the floating-point facility is installed
with the commercial instruction set, a universal instruction set is obtained.
Adding other facilities, such as the
extended-precision floating-point facil­ ity or the conditional-swapping
facility, extends the processing capa­
bilities of the system still further. System/370 has the capability of
addressing a main storage of up to 64M
bytes. The System/370 dynamic-address­
translation facility, used with appro­
priate programming support, can provide
each user with an address space of 16M
bytes independent of the amount of main
storage. The dual-address-space facili­
ty extends this by providing each user
with multiple address spaces. This
facility and this support permit a System/370 model with limited main stor­
age to be used for a much wider set of
applications, and they make many appli­
cations with requirements for extensive
storage practical and convenient.
Another major aspect of the general­
purpose design of System/370 is the
capability provided to attach a wide
variety of I/O devices through a selec­
tor channel and two types of multiplex­
ing channels. System/370 has a byte­
multiplexer channel for the attachment
of unbuffered devices and of a large
number of communications devices. Addi­
tionally, it offers a block-multiplexer
channel, which is particularly well-
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