After the instructions listed above are
executed:
Register 6 contains 00 00 00 14 = 20{10} = the remainder.
Register 7 contains 00 00 00 2D = 45{10} = the quotient.
Hote that if the dividend had not been
first placed in register 6 and shifted
into register 7, register 6 might not
have been filled with the proper
dividend-sign bits (zeros in this exam­ ple), and the DIVIDE instruction might
not have given the expected results. EXCLUSIVE OR (X, XC, XI, XR) When the Boolean operator EXCLUSIVE OR is applied to two bits, the result is
one when either, but not both, of the
two bits is one; otherwise, the result
is zero. When two bytes are EXCLUSIVE ORed, each pair of bits is handled sepa­
rately; there is no connection from one
bit position to another. The following
is an example of the EXCLUSIVE OR of two
bytes:
First-operand byte: 0011 0101{2) Second-operand byte: 0101 1100{2) Result byte: 0110 1001{2) XC Example
The EXCLUSIVE OR (XC) instruction can be
used to exchange the contents of two
areas in storage without the use of an
intermediate storage area. For example, assume two three-byte fields in storage:
359 358
Field 1 1001171901 360 362
Field 2 1001141011 Execution of the instruction (assume
that register 7 contains 00 00 03 58):
Machine Format Op Code L
D7 02 7 0011 7 008
1 Assembler Format XC 1(3,7),8(7)
Field 1 is EXCLUSIVE ORed with field 2
as follows:
Field 1 : 00000000 00010111 10010000{2} = 00 17 90{16} Field 2: 00000000 00010100 00000001{2} = 00 14 01{16} Result: 00000000 00000011 10010001{2} = 00 03 91{16}
The result replaces the former contents
of field 1. Condition code 1 is set to
indicate a nonzero result.
Now, execution of the instruction:
Machine Format Op Code L
D7 02 7 0081 7
Assembler Format XC 8(3,7),1(7)
produces the following result:
Field 1 : 00000000 00000011 10010001{2} = 00 03 91{16}
Field 2: 00000000 00010100 00000001{2} = 00 14 01{16} Result: 00000000 00010111 10010000{2} = 00 17 90{16} The result of this operation replaces
the former contents of field 2. Field 2
now contains the original value of field
1. Condition code 1 is set to indicate
a nonzero result.
Lastly, execution of the instruction:
Appendix A. Number Representation and Instruction-Use Examples A-17

Machine Format Op Code L 07 02 7 0011 7 008
1 Assembler Format XC 1(3,7),8(7)
produces the following result:
Field 1 : 00000000 00000011 10010001{2} = 00 03 91{16}
Field 2: 00000000 00010111 10010000{2} = 00 17 90{16} Result: 00000000 00010100 00000001{2} = 00 14 01{16} The result of this operation replaces
the former contents of field 1. Field 1
now contains the original value of field
2. Condition code 1 is set to indicate
a nonzero result.
XI Example
A frequent use of the EXCLUSIVE OR (XI)
instruction is to invert a bit (change a
zero bit to a one or a one bit to a
zero). For example, assume that storage
location 8082 contains 0110 1001{2}. To
invert the leftmost and rightmost bits
without affecting any of the other bits,
the following instruction can be used
(assume that register 9 contains 00 00 80 80): Machine Format Op Code 97 81 9
Assembler Format
XI 2(9),X'81'
When the instruction is executed, the
byte in storage is EXCLUSIVE ORed with
the immediate byte (the 12 field of the
instruction):
Location 8082: 0110 1001{2} Immediate byte: 1000 0001{2} Result: 1110 1000{2} A-18 System/370 Principles of Operation The resulting byte is stored back in
location 8082. Condition code 1 is set
to indicate a nonzero result.
Notes:
1. With the XC instruction, fields up
to 256 bytes in length can be
exchanged.
2. With the XR instruction, the
contents of two registers can be
exchanged.
3. Because the X instruction operates
storage to register only, an
exchange cannot be made solely by
the use of X.
4. A field EXCLUSIVE ORed with itself
is cleared to zeros.
5. For additional examples of the use
of EXCLUSIVE OR, see the section
"Floating-Point-Number Conversion" later in this appendix. EXECUTE (EX)
The EXECUTE instruction causes one
target instruction in main storage to be
executed out of sequence without actual­
ly branching to the target instruction.
Unless the Rt field of the EXECUTE instruction is zero, bits 8-15 of the
target instruction are ORed with bits
24-31 of the Rt register before the
target instruction is executed. Thus, EXECUTE may be used to supply the length
field for an SS instruction without
modifying the S5 instruction in storage.
For example, assume that a MOVE (MVC) instruction is the target that is
located at address 3820, with a format
as follows:
Machine Format Op Code L 02 00 C 0001 Assembler Format Op Code Ot(L,B t ),02(B
2
) MVC 3(1,12),0(13)
where register 12 contains 00 00 89 13 and register 13 contains 00 00 90 AO. Further assume that at storage address 5000, the following EXECUTE instruction
is located: