Register 15 contains 00 00 20 00. Storage locations 2102-2103 contain FF 09 = -39{10} = the multiplier.
The instruction:
Machine Format Op Code 4C B E F
Assembler Format OR MH 11,2(14,15)
multiplies the two numbers. The
product, FF FF Fe CO = -819{10}, replaces the original contents of regis­
ter 11. Only the rightmost 32 bits of a product
are stored in a register; any signif­
icant bits on the left are lost. No
program interruption occurs on overflow. OR (0, OC, 01, OR) When the Boolean operator OR is applied
to two bits, the result is one when either bit is one; otherwise, the result
is zero. When two bytes are ORed, each
pair of bits is handled separately;
there is no connection from one bit position to another. The following is
an example of DRing two bytes:
First-operand byte:
Second-operand byte:
Result byte: 01 Example 0011 0101{2} 0101 1100{2} 0111 1101{2} A frequent use of the OR instruction is
to set a particular bit to one. For
example, assume that storage location
4891 contains 0100 0010{2}. To set the
rightmost bit of this byte to one with­
out affecting the other bits, the following instruction can be used
(assume that register 8 contains 00 00 48 90): Machine Format Op Code 12 96 01 8
Assembler Format Op Code 0,(B,),I
2 01 1(8),X'01'
When this instruction is executed, the
byte in storage is ORed with the immedi­
ate byte (the 12 field of the instruc­
tion):
Location 4891:
Immediate byte:
Result: 0100 0010{2} 0000 0001{2} 0100 0011{2} The resulting byte with bit 7 set to one
is stored back in location 4891. Condi­ tion code 1 is set. PACK (PACK) Assume that storage locations 1000-1003 contain the following zoned-decimal
number that is to be converted to a
packed-decimal number and left in the
same location: 1000 1003 Also assume that register 12 contains 00 00 10 00. After the instruction:
Machine Format Op Code F2 3 3 C 000 I C 0001 Assembler Format PACK 0(4,12),0(4,12) is executed, 1000-1003 is
format:
the result in locations
in the packed-decimal 1000 1003 Packed number 10010112314CI Appendix A. Number Representation and Instruction-Use Examples A-25

Notes:
1. This example illustrates the opera­
tion of PACK when the first-and
second-operand fields overlap
completely.
2. During the operation, the second
operand was extended on the left
with zeros.
SHIFT LEFT DOUBLE (SLDA)
The SHIFT LEFT DOUBLE instruction shifts
the 63 numeric bits of an even-odd
register pair to the left, leaving the
sign bit unchanged. Thus, the instruc­
tion performs an algebraic left shift of
a 64-bit signed binary integer.
For example, if the contents of regis­
ters 2 and 3 are: 00 7F OA 72 FE DC BA 98 = 00000000 01111111 00001010 01110010 11111110 11011100 10111010 10011000{2} The instruction:
Machine Format Op Code 8F o
Assembler Format
SLDA 2,31(0) results in registers 2 and 3 both being
left-shifted 31 bit positions, so that
their new contents are:
7F 6E 5D 4C 00 00 00 00 = 01111111 01101110 01011101 01001100 00000000 00000000 00000000 00000000{2} Because significant bits are shifted out
of bit position 1 of register 2, over­
flow is indicated by setting condition
code 3, and, if the fixed-poi nt-overflow
mask bit in the PSW is one, a fixed­
point-overflow program interruption
occurs.
SHIFT LEFT SINGLE (SLA)
The SHIFT LEFT SINGLE instruction is
similar to SHIFT LEFT DOUBLE, except
that it shifts only the 31 numeric bits
of a single register. Therefore, this
A-26 System/370 Principles of Operation
instruction performs an algebraic left
shift of a 32-bit signed binary integer.
For example, if the contents of register
2 are: 00 7F OA 72 = 00000000 01111111 00001010 01110010{2} The instruction:
Machine Format Op Code 8B 2 1////1 o 008
1 Assembler Format
SLA 2,8(0) results in register 2 being shifted left
eight bit positions so that its new
contents are:
7F OA 72 00 = 01111111 00001010 01110010 00000000{2} Condition code 2 is set to indicate that
the result is greater than zero.
If a left shift of nine places had been
specified, a significant bit would have
been shifted out of bit position 1. Condition code 3 would have been set to
indicate this overflow and, if the
fixed-poi nt-overflow mask bit in the PSW were one, a fixed-point overflow inter­
ruption would have occurred. STORE CHARACTERS UNDER MASK (STCM) STORE CHARACTERS UNDER MASK (STCM) may
be used to place selected bytes from a
register into storage. For example, if
it is desired to store a three-byte
address from general register 8 into
location FIELD3, assume:
Machine Format Op Code BE 8 7
Register Format STCM 8,B'0111',FIELD3