BYTE-ORIENTED-OPERAND FACILITY
The byte-oriented-operand facility is
standard on System/370. This facility
permits storage operands of most unpriv­
ileged instructions to appear on any
byte boundary.
The facility does not pertain to
instruction addresses or to the operands
for COMPARE AND SWAP and COMPARE DOUBLE AND SWAP. Instructions must appear on
two-byte integral boundaries. The
rightmost bit of a branch address must
be zero, and the instruction EXECUTE must designate the target instruction at
an even byte address. COMPARE AND SWAP
must designate a four-byte integral
boundary, and COMPARE DOUBLE AND SWAP
must designate an eight-byte integral
boundary.
Programming Note
For fixed-field-Iength operations with
field lengths that are a power of 2,
significant performance degradation is
possible when storage operands are not
positioned at addresses that are inte­
gral multiples of the operand length.
To improve performance, frequently used
storage operands should be aligned on
integral boundaries. ADDRESS TYPES For purposes of addressing main storage,
three basic types of addresses are
recognized: absolute, real, and
virtual. The addresses are distin­
guished on the basis of the transf­
ormations that are applied to the
address during a storage access.
Address translation converts virtual to
real, and prefixing converts real to
absolute. In addition to the three
basic address types, additional types
are defined which are treated as one or
another of the three basic types,
depending on the instruction and the
current mode.
Absolute Address
An absolute address is the address
assigned to a main-storage location. An
absolute address is used for a storage
access without any transformations
performed on it.
All CPUs and channels in the configura­ \ tion refer to a shared main-storage
location by using the same absolute , address. Available main storage is
usually assigned contiguous absolute
addresses starting at 0, and the
addresses are always assigned in
complete 2K-byte blocks on integral
boundaries. When either TEST BLOCK or
the storage-key 4K-byte-block facility
is installed, storage is assigned in
complete 4K-byte blocks on integral
boundaries. An exception is recognized
when an attempt is made to use an abso­
lute address in a block which has not
been assigned to physical locations. On some models, storage-reconfiguration
controls may be provided which permit
the operator to change the correspond­
ence between absolute addresses and
physical locations. However, at anyone
time, a physical location is not associ­
ated with more than one absolute
address.
Storage consisting of byte
sequenced according to their
addresses is referred to as
storage.
Real Address
locations
absolute
absolute
A real address identifies a location in
real storage. When a real address is
used for an access to main storage, it
is converted, by means of prefixing, to
an absolute address.
At any instant there is one real-address
to absolute-address mapping for each CPU in the configuration. When a real
address is used by a CPU to access main
storage, it is converted to an absolute
address by prefixing. The particular
transformation is defined by the value
in the prefix register for the CPU. Storage consisting of byte locations
sequenced according to their real
addresses is referred to as real
storage.
Virtual Address
A virtual address identifies a location
in virtual storage. When a virtual
address is used for an access to main
storage, it is translated by means of
dynamic address translation to a real
address, which is then further converted
by prefixing to an absolute address.
Primary Virtual Address
A primary virtual address is a virtual
address which is to be translated by
means of the primary segment-table
designation. When DAS is not installed,
all logical addresses are treated as
Chapter 3. Storage 3-5

primary virtual addresses when OAT is
on. When DAS is installed, logi cal
addresses and instruction addresses are
treated as primary virtual addresses
when in the primary-space mode. The
first-operand address of MOVE TO PRIMARY
and the second-operand address of MOVE TO SECONDARY are always treated as
primary virtual addresses. Secondary Virtual Address
A secondary virtual address is a virtual
address which is to be translated by
means of the secondary segment-table
designation. When DAS is not installed,
secondary virtual addresses do not
occur. When DAS is installed, logical
addresses are treated as secondary
virtual addresses when in the
secondary-space mode. The second­
operand address of MOVE TO PRIMARY and the first-operand address of MOVE TO SECONDARY are always treated as second­
ary virtual addresses.
logical Address
Except where otherwise specified, the
storage-operand addresses for most
instructions are logical addresses.
When DAS is not installed, logical
addresses are treated as real addresses
when OAT is off and as virtual addresses
when OAT is on. When DAS is installed,
logical addresses are treated as real
addresses in the real mode, treated as
primary virtual addresses in the
prlmary-space mode, and treated as
secondary virtual addresses in the
secondary-space mode. Some instructions
have storage-operand addresses or stor­
age accesses associated with the
instruction which do not follow the
rules for logical addresses. In all
such cases, the instruction definition
contains a definition of the type of
address.
Instruction Address
Addresses used to fetch instructions
from storage are called instruction
addresses. When DAS is not installed,
instruction addresses are the same as
logical addresses. When DAS is
installed, instruction addresses are
treated as real addresses in the real
mode, treated as primary virtual
addresses in the primary-space mode, and
treated as either primary virtual
addresses or secondary virtual addresses
in the secondary-space mode. The
instruction address in the current PSW 3-6 System/370 Principles of Operation and the target address of EXECUTE are
instruction addresses. Note: When the CPU is in the
secondary-space mode, it is unpredict­
able whether instructions, including the
target of EXECUTE, are fetched from the
primary address space or the secondary
address space. For detai Is, see the
section "Translation Modes" and the
associated programming notes under the
section "Dynamic Address Translation" in
this chapter.
Effective Address
In some situations, it is convenient to
use the term "effective address." An
effective address is the address which
results from address arithmetic, before
address translation, if any, is
performed. Address arithmetic is the
addition of the base and displacement or
of the base, index, and displacement. STORAGE KEY A storage key is associated with each
2K-byte block of storage that is avail­
able in the configuration. When the
storage-key 4K-byte-block facility is installed, all of the storage keys are
associated with a 4K-byte block. The
storage key has the following format:
o 4 6
The bit positions in the storage key are
allocated as follows:
Access-Control Bits (ACC): If a refer­
ence is subject ~ key-controlled
protection, the four access-control
bits, bits 0-3, are matched with the
four-bit access key when information is
stored, or when information is fetched
from a location that is protected
against fetching.
Fetch-Protection Bit (f): If a refer­
ence is subjec-t--to key-controlled
protection, the fetch-protection bit,
bit 4, controls whether key-controlled
protection applies to fetch-type refer­
ences: a zero indicates that only
store-type references are monitored and
that fetching with any access key is
permitted; a one indicates that key­
controlled protection applies to both
fetching and storing. No distinction is
made between the fetching of
instructions and of operands.
Reference Bit (R): The reference bit, 4 bit 5, normally Is set to one each time ~