partially in the byte-multiplex mode and
partially in the burst mode.
A block-multiplexer channel contains
multiple subchannels and can only oper­
ate in burst mode. A block-multiplexer
channel operates most efficiently with
devices that are designed to operate in
burst mode. When multiplexing is not
inhibited, the channel permits multi­
plexing between bursts, between blocks
when command chaining is specified, or
when command retry is performed. On most models, the burst is forced to
extend over the block of data, and
multiplexing occurs between blocks of
data when command chaining is specified.
Whether or not multiplexing occurs
depends on the design of the channel and I/O device and on the state of the
block-multiplexing-control bit. When the block-multiplexing-control bit,
bit 0 of control register 0, is zero, multiplexing is inhibited; when it is one, multiplexing is allowed.
Whether a block-multiplexer channel
executes an I/O operation with multi­
plexing inhibited or allowed is deter­
mined by the state of the block­
multiplexing-control bit at the time the
operation is initiated by START I/O or
START I/O FAST RELEASE and applies to
that operation until the involved
subchannel becomes available.
For brevity, the term "multiplexer chan­
nel" is used hereafter when describing a
function or facility that is common to
both the byte-multiplexer and the
block-multiplexer channel. Multiplexer
channels vary in the number of subchan­
nels they contain. When multiplexing,
they can sustain concurrently one I/O operation per subchannel, provided that
the total load on the channel does not
exceed its capacity. Each subchannel
appears to the program as an independent
selector channel, except in those
aspects of communication that pertain to
the physical channel. (For example, individual subchannels on a multiplexer
channel are not distinguished as such by
the TEST CHANNEL instruction or by the
masks controlling I/O interruptions from
the channel.) When a multiplexer chan­
nel is not servicing an I/O device, it
monitors the attached devices for data
and for status information.
Subchannels on a multiplexer channel may be either nonshared or shared.
A subchannel is referred to as nonshared
if it is associated with and can be used
only by a single I/O device. A
nonshared subchannel is used with
devices that do not have any
restrictions on the concurrency of
channel-program operations, such as a , single drive of an IBM 3330 Disk
Storage.
A subchannel is referred to as shared if
data transfer to or from a set of
devices implies the use of the same
subchannel. Only one device associated
with a shared subchannel may be involved in data transmission at a time. Shared
subchannels are used with devices, such
as magnetic-tape units or some display
devices, that share a control unit. For
such devices, the sharing of the
subchannel does not restrict the concur­
rency of I/O operations since the
control unit permits only one device to
be involved in a data-transfer operation
at a time. I/O devices may share a
control unit without necessarily sharing
a subchannel. For example, the IBM 3880 storage control recognizes 64 device
addresses, each of which is assigned a
nonshared subchannel.
Programming Note
A block-multiplexer channel can be made
to operate as a selector channel by the
appropriate setting of the block­
multiplexing-control bit. However, since a block-multiplexer channel inher­
ently can interleave the execution of
multiple I/O operations and since the
state of the block-multiplexing-control
bit can be changed at any time, it is
possible to have one or more operations
that permit multiplexing and an opera­
tion that inhibits multiplexing being
executed simultaneously by a channel.
Therefore, to ensure complete compat­
ibility with selector channel operation,
all operational subchannels on the
block-multiplexer channel must be avail­
able or operating with multiplexing
inhibited when the use of that channel
as a selector channel is begun. All
subsequent operations should then be
initiated with the block-multiplexing­
control bit inhibiting multiplexing. I/O-SYSTEM OPERATION Input/output operations are initiated
and controlled by information with two
types of formats: instructions and
channel-command words (CCWs). Instructions are decoded by the CPU and
are part of the CPU program. CCWs are
decoded and executed by the channels and I/O devices and initiate I/O operations,
such as reading and writing. One or
more CCWs arranged for sequential
execution form a channel program. Both
instructions and CCWs are fetched from
storage. The formats of CCWs are common
for all types of I/O devices, although
the modifier bits in the command code of
a CCW may specify device-dependent oper­
ations. Chapter 13. Input/Output Operations 13-5

The CPU program initiates I/O operations
with the instruction START I/O or START I/O FAST RELEASE. These instructions
identify the channel and the I/O device
and cause the channel to fetch the
channel-address word (CAW) from a fixed
location in real storage. The CAW contains the subchannel key and
suspend-control bit and designates the
location in storage from which the chan­
nel subsequently fetches the first CCW. The CCW specifies the command to be
executed and the storage area, if any,
to be used.
When START I/O is executed and the
addressed channel and subchannel are
available and when the suspend flag is
not specified in the CCW, the channel
attempts to select the I/O device and
sends the command-code part of the CCW to the control unit. The device
responds indicating whether it can
execute the command. If the suspend
flag is specified, the command code is
not sent to the device, and, depending
on the circumstances, the operation is ·either suspended or terminated instead.
At this time, the execution of START I/O is completed. The results of the
attempt to initiate the execution of the
command are indicated by setting the
condition code in the PSW and, in
certain situations, by storing pertinent
information in the channel-status word (CSW). When START I/O FAST RELEASE is executed,
the functions performed during the
execution of the instruction depend on
the design of the channel. Some chan­
nels perform the same functions as for
START I/Oj other channels release the CPU (that is, complete the execution of
the instruction) before the I/O opera­
tion has been initiated at the addressed
device. Channels are permitted to
release the CPU as early as when the CAW has been fetched and validated. Chan­ nels designed to release the CPU before
the I/O operation is initiated at the I/O device perform the functions associ­
ated with I/O operation initiation
logically subsequent and asynchronous to
the execution of START I/O FAST RELEASE.
When the CPU is released, the results of
the execution of the instruction to that
point are indicated by setting the
condition code in the PSW and, in
certain situations, by storing pertinent
information in the CSW. If the I/O operation is initiated at the I/O device and its execution involves
transfer of data, the subchannel is set
up to respond to service requests from
the device and assumes further control
of the operation. In operations that do
not require any data to be transferred
to or from the device, the device may
signal the end of the operation imme­ diatelY on receipt of the command code.
13-6 System/370 Principles of Operation
An I/O operation may involve transfer of
data to one storage area, designated by
a single CCW, or to a number of noncon­
tiguous storage areas. In the latter
case, generally a list of CCWs is used
for execution of the I/O operation, each CCW designating a contiguous storage
area, and the CCWs are said to be
coupled by data chaining. Data chaining
is specified by a flag in the CCWand causes the channel to fetch another CCW upon the exhaustion or filling of the
storage area designated by the current CCW. The storage area designated by a CCW fetched on data chaining pertains to
the I/O operation already in progress at
the I/O device, and the I/O device is
not notified when a new CCW is fetched. Provision is made in the CCW format for
the programmer to specify that, when the CCW is decoded, the channel request an I/O interruption as soon as possible,
thereby notifying the CPU program that
chaining has progressed at least far
as that CCW. To complement the dynamic-address­
translation facility available in the CPU, channel indirect data addressing is
available. A flag in the CCW specifies
that an indirect-data-address list is to
be used to designate the storage areas
for that CCW. Each time the boundary of a 2K-byte block of storage is reached,
the list is referenced to determine the
next block of storage to be used. By
extending the storage-addressing capa­
bilities of the channel, channel
indirect data addressing permits essen­
tially the same CCW sequences to be used
for a program running with dynamic
address translation in the CPU that
would be used if it were operating with
equivalent contiguous real storage.
The conclusion of an I/O operation
normally is indicated by channel end and
device end. When channel end is
presented, it means that the I/O device
has received or provided all data asso­
ciated with the operation and no longer
needs channel facilities. When device
end is presented, it usually means that
the I/O device has concluded execution
of the I/O operation. On some I/O devices, for reasons of performance,
device end is presented before the I/O operation has been concluded. Device
end can occur concurrently with channel
end or later.
Operations that keep the control unit
busy after releasing channel facilities
may, in some situations, cause a third
indication called control-unit end.
Control-unit end may occur only concur­
rently with or after channel end. Concurrent with channel end, both the
channel and the I/O device can provide
indications of unusual situations. Control-unit end and device end can be