GA22-7000-10 IBM System/370 Principles of Operation Sept 1987 Page 7-5 (194 of 558)

Mne- Op Name monic Characteristics Code
ADD AR RR C IF R lA
ADD A RX C A IF R SA
ADD HALFWORD AH RX C A IF R 4A
ADD LOGICAL ALR RR C R IE ADD LOGICAL AL RX C A R 5E
AND NR RR C R 14 AND N RX C A R 54
AND (character) NC SS C A ST D4
AND (immediate) NI SI C A ST 94
BRANCH AND LINK BALR RR B R 05 BRANCH AND LINK BAL RX B R 45
BRANCH AND SAVE BASR RR BS B R OD BRANCH AND SAVE BAS RX BS B R 4D
BRANCH ON CONDITION BCR RR
¢l
B 07 BRANCH ON CONDITION BC RX B 47
BRANCH ON COUNT BCTR RR B R 06 BRANCH ON COUNT BCT RX B R 46
BRANCH ON INDEX HIGH BXH RS B R 86
BRANCH ON INDEX lOW OR EQUAL BXlE RS B R 87 COMPARE CR RR C 19 COMPARE C RX C A 59 CO~lPARE AND SWAP CS RS C SW A SP $ R ST BA COt-1PARE DOUBLE AND SWAP CDS RS C SW A SP $ R ST SS CONPARE HAlFWORD CH RX C A 49 COf"1PARE lOGICAL CLR RR C 15 COMPARE lOGICAL CL RX C A 55 COMPARE LOGICAL (character) CLC SS C A D5 Cot1PARE LOGICAL (immediate) CLI SI C A 95 COMPARE lOGICAL C. UNDER MASK CLM RS C A SD COf'lPARE LOGICAL LONG CLCL RR C A SP II R OF CONVERT TO BINARY CVB RX A D IK R 4F CONVERT TO DECIMAL CVD RX A ST 4E
DIVIDE DR RR SP IK R 1D
DIVIDE D RX A SP IK R 5D
EXCLUSIVE OR XR RR C R 17
EXCLUSIVE OR X RX C A R 57
EXCLUSIVE OR (character) XC S5 C A ST D7
EXCLUSIVE OR (immediate) XI SI C A ST 97
EXECUTE EX RX AI SP EX 44
INSERT CHARACTER IC RX A R 43
INSERT CHARACTERS UNDER MASK ICM RS C A R BF LOAD LR RR R 18 LOAD L RX A R 58 LOAD ADDRESS LA RX R 41 LOAD AND TEST LTR RR C R 12
Summary of General Instructions (Part 1 of 3)
Chapter 7. General Instructions 7-5

Mne- Op Name monic Characteristics Code LOAD CO~1P L EMENT LCR RR C IF R 13 LOAD HALFWORD LH RX A R 48 LOAD f'1UL TIPlE LM RS A R 98 LOAD NEGATIVE LNR RR C R 11 LOAD POSITIVE LPR RR C IF R 10 MONITOR CALL MC 51 SP MO AF MOVE (character) MVC 55 A ST D2 MOVE (immediate) MVI 51 A ST 92 r'10VE INVERSE MVCIN 55 MI A ST E8 r'lOVE LONG NVCL RR C A SP II R ST OE f-l0VE NUMERICS MVN 55 A ST Dl NOVE WITH OFFSET NVO 55 A ST Fl r10VE ZONES t-1VZ SS A ST D3 f'1ULTIPLY ~1R RR SP R IC MULTIPLY M RX A SP R 5C MULTIPLY HALFWORD MH RX A R 4C OR OR RR C R 16 OR 0 RX C A R 56 OR (character) OC 55 C A ST D6 OR (immediate) 01 51 C A ST 96 PACK PACK 55 A ST F2
SET PROGRAM MASK SPM RR l 04 SHIFT lEFT DOUBLE SLDA RS C SP IF R 8F
SHIFT LEFT DOUBLE LOGICAL SLDL RS SP R 8D
SHIFT LEFT SINGLE SLA RS C IF R 8B
SHIFT LEFT SINGLE LOGICAL SLL RS R 89
SHIFT RIGHT DOUBLE SRDA RS C SP R 8E
SHIFT RIGHT DOUBLE LOGICAL SRDL RS SP R 8C SHIFT RIGHT SINGLE SRA RS C R 8A
SHIFT RIGHT SINGLE LOGICAL SRL RS R 88 STORE ST RX A ST 50 STORE CHARACTER STC RX A ST 42 STORE CHARACTERS UNDER MASK STCM RS A ST BE STORE CLOCK STCK 5 C A $ ST B205 STORE HALFWORD 5TH RX A ST 40 STORE MULTIPLE STM RS A ST 90 SUBTRACT SR RR C IF R IB SUBTRACT 5 RX C A IF R 5B SUBTRACT HALFWORD SH RX C A IF R 4B SUBTRACT LOGICAL SLR RR C R IF SUBTRACT LOGICAL SL RX C A R SF SUPERVISOR CALL SVC RR ¢ OA TEST AND SET TS S C A $ ST 93
TEST UNDER MASK TM SI C A 91
TRANSLATE TR SS A ST DC TRANSLATE AND TEST TRT 55 C A GM R DD UNPACK UNPK 55 A ST F3
Summary of General Instructions (Part 2 of 3)
7-6 System/370 Principles of Operation

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Extracted Text (may have errors)

Mne- Op Name monic Characteristics Code
ADD AR RR C IF R lA
ADD A RX C A IF R SA
ADD HALFWORD AH RX C A IF R 4A
ADD LOGICAL ALR RR C R IE ADD LOGICAL AL RX C A R 5E
AND NR RR C R 14 AND N RX C A R 54
AND (character) NC SS C A ST D4
AND (immediate) NI SI C A ST 94
BRANCH AND LINK BALR RR B R 05 BRANCH AND LINK BAL RX B R 45
BRANCH AND SAVE BASR RR BS B R OD BRANCH AND SAVE BAS RX BS B R 4D
BRANCH ON CONDITION BCR RR
¢l
B 07 BRANCH ON CONDITION BC RX B 47
BRANCH ON COUNT BCTR RR B R 06 BRANCH ON COUNT BCT RX B R 46
BRANCH ON INDEX HIGH BXH RS B R 86
BRANCH ON INDEX lOW OR EQUAL BXlE RS B R 87 COMPARE CR RR C 19 COMPARE C RX C A 59 CO~lPARE AND SWAP CS RS C SW A SP $ R ST BA COt-1PARE DOUBLE AND SWAP CDS RS C SW A SP $ R ST SS CONPARE HAlFWORD CH RX C A 49 COf"1PARE lOGICAL CLR RR C 15 COMPARE lOGICAL CL RX C A 55 COMPARE LOGICAL (character) CLC SS C A D5 Cot1PARE LOGICAL (immediate) CLI SI C A 95 COMPARE lOGICAL C. UNDER MASK CLM RS C A SD COf'lPARE LOGICAL LONG CLCL RR C A SP II R OF CONVERT TO BINARY CVB RX A D IK R 4F CONVERT TO DECIMAL CVD RX A ST 4E
DIVIDE DR RR SP IK R 1D
DIVIDE D RX A SP IK R 5D
EXCLUSIVE OR XR RR C R 17
EXCLUSIVE OR X RX C A R 57
EXCLUSIVE OR (character) XC S5 C A ST D7
EXCLUSIVE OR (immediate) XI SI C A ST 97
EXECUTE EX RX AI SP EX 44
INSERT CHARACTER IC RX A R 43
INSERT CHARACTERS UNDER MASK ICM RS C A R BF LOAD LR RR R 18 LOAD L RX A R 58 LOAD ADDRESS LA RX R 41 LOAD AND TEST LTR RR C R 12
Summary of General Instructions (Part 1 of 3)
Chapter 7. General Instructions 7-5

Mne- Op Name monic Characteristics Code LOAD CO~1P L EMENT LCR RR C IF R 13 LOAD HALFWORD LH RX A R 48 LOAD f'1UL TIPlE LM RS A R 98 LOAD NEGATIVE LNR RR C R 11 LOAD POSITIVE LPR RR C IF R 10 MONITOR CALL MC 51 SP MO AF MOVE (character) MVC 55 A ST D2 MOVE (immediate) MVI 51 A ST 92 r'10VE INVERSE MVCIN 55 MI A ST E8 r'lOVE LONG NVCL RR C A SP II R ST OE f-l0VE NUMERICS MVN 55 A ST Dl NOVE WITH OFFSET NVO 55 A ST Fl r10VE ZONES t-1VZ SS A ST D3 f'1ULTIPLY ~1R RR SP R IC MULTIPLY M RX A SP R 5C MULTIPLY HALFWORD MH RX A R 4C OR OR RR C R 16 OR 0 RX C A R 56 OR (character) OC 55 C A ST D6 OR (immediate) 01 51 C A ST 96 PACK PACK 55 A ST F2
SET PROGRAM MASK SPM RR l 04 SHIFT lEFT DOUBLE SLDA RS C SP IF R 8F
SHIFT LEFT DOUBLE LOGICAL SLDL RS SP R 8D
SHIFT LEFT SINGLE SLA RS C IF R 8B
SHIFT LEFT SINGLE LOGICAL SLL RS R 89
SHIFT RIGHT DOUBLE SRDA RS C SP R 8E
SHIFT RIGHT DOUBLE LOGICAL SRDL RS SP R 8C SHIFT RIGHT SINGLE SRA RS C R 8A
SHIFT RIGHT SINGLE LOGICAL SRL RS R 88 STORE ST RX A ST 50 STORE CHARACTER STC RX A ST 42 STORE CHARACTERS UNDER MASK STCM RS A ST BE STORE CLOCK STCK 5 C A $ ST B205 STORE HALFWORD 5TH RX A ST 40 STORE MULTIPLE STM RS A ST 90 SUBTRACT SR RR C IF R IB SUBTRACT 5 RX C A IF R 5B SUBTRACT HALFWORD SH RX C A IF R 4B SUBTRACT LOGICAL SLR RR C R IF SUBTRACT LOGICAL SL RX C A R SF SUPERVISOR CALL SVC RR ¢ OA TEST AND SET TS S C A $ ST 93
TEST UNDER MASK TM SI C A 91
TRANSLATE TR SS A ST DC TRANSLATE AND TEST TRT 55 C A GM R DD UNPACK UNPK 55 A ST F3
Summary of General Instructions (Part 2 of 3)
7-6 System/370 Principles of Operation

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A signed binary integer of either sign,
except for zero and the maximum negative number, can be changed to a number of
the same magnitude but opposite sign by
forming its two's complement. Forming
the two's complement of a number is
equivalent to subtracting the number
from zero. The two's complement of zero
is zero.
The two's complement of the maximum
negative number cannot be represented in
the same number of bits. When an opera
tion, such as LOAD COMPLEMENT, attempts
to produce the two's complement of the
maximum negative number, the result is
the maximum negative number, and a
fixed-paint-overflow exception is recog
nized. An overflow does not result,
however, when the maximum negative
number is complemented as an intermedi
ate result but the final result is
within the representable range. An example of this case is a subtraction of
the maximum negative number from -1.
The product of two maximum negative
numbers of a given length is represent
able as a positive number of double that
length.
In discussions of signed binary integers
in this publication, a signed binary
integer includes the sign bit. Thus,
the expression "32-bit signed binary integer" denotes an integer with 31
numeric bits and a sign bit, and the
expression "64-bit signed binary
integer" denotes an integer with 63
numeric bits and a sign bit.
In an arithmetic operation, a carry out
of the numeric field of a signed binary
integer is carried into the sign bit.
However, in algebraic left-shifting, the
sign bit does not change even if signif
icant numeric bits are shifted out.
1. An alternate way of forming the
two's complement of a signed binary
integer is to invert all bits to
the left of the rightmost one bit,
leaving the rightmost one bit and
all zero bits to the right of it
unchanged.
2. The numeric bits of a signed binary
integer may be considered to repre
sent a positive value, with the
sign representing a value of either
zero or the maximum negative
number. BINARY ARITHMETIC
SIGNED BINARY ARITHMETIC Addition and Subtraction
Addition of signed binary integers is
performed by adding all bits of each
operand, including the sign bits. When
one of the operands is shorter, the
shorter operand is considered to be
extended on the left to the length of
the longer operand by propagating the
sign-bit value.
Subtraction is performed by adding the
one's complement of the second operand
and a value of one to the first operand.
Fixed-Point Overflow
A fixed-point-overflow condition exists
for signed binary addition or
subtraction when the carry out of the
sign-bit position and the carry out of
the leftmost numeric bit position disa
gree. Detection of an overflow does not
affect the result produced by the addi
tion. In mathematical terms, signed
addition and subtraction produce a
fixed-point overflow when the result is
outside the range of representation for
signed binary integers. Specifically,
for ADD and SUBTRACT, which operate on
32-bit signed binary integers, there is
an overflow when the proper result would
be greater than or equal to +2
31
or less
than -2
31
• The actual result placed in
the general register after an overflow
differs from the proper result by 232. A fixed-point overflow causes a program
interruption if allowed by the program
mask.
The instructions SHIFT LEFT SINGLE and
SHIFT LEFT DOUBLE produce an overflow
when the result is outside the range of
representation for signed binary inte gers. The actual result differs from
that for addition and subtraction in
that the sign of the result remains the
same as the original sign.
UNSIGNED BINARY ARITHMETIC
Addition of unsigned binary integers is
performed by adding all bits of each
operand. When one of the operands is
shorter, the shorter operand is consid
ered to be extended on the left with
zeros. Unsigned binary arithmetic is
used in address arithmetic for adding
the X, B, and D fields. (See the Chapter 7. General Instructions 7-3

section "Address Generation" in Chapter 5, "Program Execution.") It is also used
to obtain the addresses of the function bytes in TRANSLATE and TRANSLATE AND TEST. Furthermore, unsigned binary
arithmetic is used on 32-bit unsigned
binary integers by ADD LOGICAL and SUBTRACT LOGICAL. Given the same two
operands, ADD and ADD LOGICAL produce
the same 32-bit result. The
instructions differ only in the inter
pretation of this result. ADD
interprets the result as a signed binary
integer and inspects it for sign, magni
tude, and overflow to set the condition
code accordingly. ADD LOGICAL inter prets the result as an unsigned binary integer and sets the condition code
according to whether the result is zero
and whether there was a carry out of bit
position o. Such a carry is not consid
ered an overflow, and no program
interruption for overflow can occur for
ADD LOGICAL. SUBTRACT LOGICAL differs from ADD LOGICAL in that the one's complement of
the second operand and a value of one
are added to the first operand.
Programming Notes 1. Logical addition and subtraction
may be used to perform arithmetic
on multiple-precision binary-
integer operands. Thus, for
multiple-precision addition, ADD LOGICAL can be used to add the
corresponding parts of the operands
beginning with the lowest-order
parts. If the condition code indi
cates a carry, a value of one
should be added to the sum of the
next-higher-order parts. If the
multiple-precision operands are
signed, ADD should be used on the
highest-order parts. The condition
code then indicates any overflow or
the proper sign and magnitude of
the entire result; an overflow is also indicated by a program inter
ruption for fixed-point overflow if
allowed by the program mask. If
the multiple-precision operands are
unsigned, ADD LOGICAL should be
used throughout.
2. Another use for ADD LOGICAL is to
increment values representing bina
ry counters, which are allowed to
wrap around from all ones to all
zeros without indicating overflow. SIGNED AND LOGICAL COMPARISON Comparison operations determine whether
two operands are equal or not and, for
7-4 System/370 Principles of Operation most operations, which of two unequal
operands is the greater (high).
Signed-binary-comparison operations are
provided which treat the operands as signed binary integers, and logical
comparison operations are provided which
treat the operands as unsigned binary
integers or as unstructured data. COMPARE and COMPARE HALFWORD are
signed-binary-comparison operations.
These instructions are equivalent to SUBTRACT and SUBTRACT HALFWORD without
replacing either operand, the resulting
difference being used only to set the
condition code. The operations permit comparison of numbers of opposite sign
which differ by 2
31
or more. Thus,
unlike SUBTRACT, COMPARE cannot cause
overflow.
Logical comparison of two operands is
performed byte by byte, in a left-to
right sequence. The operands are equal
when all their bytes are equal. When
the operands are unequal, the comparison
result is determined by a left-to-right
comparison of corresponding bit posi
tions in the first unequal pair of
bytes: the zero bit in the first
unequal pair of bits indicates the low
operand, and the one bit the high oper
and. Since the remaining bit and byte
positions do not change the comparison,
it is not necessary to continue compar
ing unequal operands beyond the first
unequal bit pair. INSTRUCTIONS The general instructions and their
mnemonics, formats, and operation codes are listed in the figure "Summary of General Instructions." The figure also
indicates when the condition code is set
and the exceptional conditions in oper
and designations, data, or results that
cause a program interruption.
A detailed definition of instruction
formats, operand designation and length,
and address generation is contained in the section "Instructions" in Chapter 5,
"Program Execution." Exceptions to the
general rules stated in that section are
explicitly identified in the individual
instruction descriptions.
Note: In the detailed descriptions of
the individual instructions, the mnemon
ic and the symbolic operand designations
for the assembler language are shown
with each instruction. For LOAD AND TEST, for example, LTR is the mnemonic
and Rt, R2 the operand designation.

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Explanation: ¢ Causes serialization and checkpoint synchronization.
¢l Causes serialization and checkpoint synchronization when the Mt and R:z fields contain all ones and all zeros, respectively.
$ Causes serialization.
A Access exceptions for logical addresses.
AI Access exceptions for instruction address.
B PER branch event. BS Branch-and-save facility. C Condition code is set.
D Data exception.
EX Execute exception.
GM Instruction execution includes the implied use of general registers 1
and 2.
IF Fixed-point-overflow exception.
II Interruptible instruction.
IK Fixed-point-divide exception.
L Hew condition code is loaded.
MI Move-inverse facility. MO Monitor event.
R PER general-register-alteration event.
RR RR instruction format. RS RS instruction format.
RX RX instruction format. S S instruction format. SI SI instruction format. SP Specification exception. SS SS instruction format.
5T PER storage-alteration event. 5W Conditional-swapping facility. Summary of General Instructions (Part 3 of 3)
ADD
AR R 11 R2 [RR] , 1 A' I R t I R2 I 0 8 12 15
A Rt ,D:z(X
2
,B
2
) [RX]
'SA' I R t I X:z I B2 D:z 0 8 12 16 20 31
The second operand is added to the first
operand, and the sum is placed at the
first-operand location. The operands
and the sum are treated as 32-bit signed
binary integers.
When there is an overflow, the result is
obtained by allowing any carry into the
sign-bit position and ignoring any carry
out of the sign-bit position, and condi
tion code 3 is set. If the fixed
point-overflow mask is one, a program
interruption for fixed-point overflow
occurs.
Resulting Condition Code: o Result zero; no overflow
1
2
3
Result less than zero; no over
flow
Result greater than zero; no
overflow Overflow Program Exceptions:
Access (fetch, operand 2 of A only)
Fixed-point overflow
ADD HALFWORD AH [RX]
'4A'
o 8 12 16 20 31
The second operand is added to the first
operand, and the sum is placed at the
first-operand location. The second
operand is two bytes in length and;s
treated as a 16-bit signed binary inte
ger. The first operand and the sum are
treated as 32-bit signed binary
integers.
When there is an overflow, the result is
obtained by allowing any carry into the
sign-bit position and ignoring any carry
out of the sign-bit position, and condi
tion code 3 is set. If the fixed- Chapter 7. General Instructions 7-7

point-overflow mask is one, a program AND interruption for fixed-point overflow
occurs.
Resulting Condition Code: 0 Result zero; no overflow
1 Result less than zero; no over-
flow
2 Result greater than zero; no
overflow
3 Overflow
Program Exceptions:
Access (fetch, operand 2)
Fixed-point overflow
Programming Note
An example of the use of the ADD HAlF WORD instruction is given in Appendix A.
ADD LOGICAL AlR R t , R:z [RR] 'IE' I R t I R2 I 0 8 12 15
AL Rt,D:z(X:z,B:z) [RX]
'5E' I R t I X 2 I B2 O 2 0 8 12 16 20 31
The second operand is added to the first
operand, and the sum is placed at the
first-operand location. The operands
and the sum are treated as 32-bit
unsigned binary integers.
Resulting Condition Code: o Result zero; no carry
1 Result not zero; no carry
2 Result zero; carry
3 Result not zero; carry
Program Exceptions:
Access (fetch, operand 2 of Al
only)
7-8 System/370 Principles of Operation NR [RR]
' 14 ' I R t I R2 I 0 8 12 15 N R"D 2 (X:z,B:z) [RX]
'54'
o 8 12 16 20 31 NI [5I]
'94'
o 8 16 20 31 NC [55] ,--_' D_4 _' ----'-- __ l_ ...... I_B_t ---'Ir....-~, I B 2 I ~J o 8 16 20 32 36 47
The AND of the first and second operands
is placed at the first-operand location.
The connective AND is applied to the
operands bit by bit. A bit position in
the result is set to one if the corre
sponding bit positions in both operands
contain ones; otherwise, the result bit
is set to zero.
For AND (NC), each operand is processed
left to right. When the operands over
lap, the result is obtained as if the
operands were processed one byte at a
time and each result byte were stored
immediately after fetching the necessary
operand bytes.
For AND (NI), the first operand is one
byte in length, and only one byte is
stored.
Resulting Condition Code: o
1
2
3
Result zero
Result not zero
Program Exceptions:
Access (fetch, operand 2, Nand NC; fetch and store, operand 1, NI and NC)

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