APPENDIX  ~   CHANGES   AFFECTING   COMPATIBILITY   BETWEEN  SYSTEM/360   AHD   SYSTEM/370   Removal  of  USASCII-8   Mode  •••••••••••••••••••••••••••••••   H-1  Operation   Codes   of  110   Instructions  •••••••••••••••••••••   H-1  
HaltI/O   ..••••.•••••••••••..•••••••••••••••••••••••••.   H-1  
start1/0   ..•.•.••.•.••••••.•••.•••••.••••••••••••••.••   H-1  
TestChannel   ..•.•.•••••••••.••••••••.•••••••••••••.•••   H-2  
Logout..•.•...••....•.•••••••••••••••••••••..••••.••••.•   H-2  Command   Retry  ..••...•••••.••••••••••••.•••••••••..•••..•   H-2  Channel   Prefetching   .•••..•••••.•••••••.•••••••.••••••••.   H-2  
Validity of Data....••..•••..••••••••••••••••••••.••••••   H-2  
This appendix summarizes those changes
included in theSystem/370   architecture  
that may affect whether or not a program
written according to theSystem/360   architecture  will  operate  on  models  
implementing theSystem/370   architecture  
described in this publication. Not
included are descriptions ofSystem/370   functions  which  are  compatible  exten  
sions, that is, (1) those that are
suppressed on initialization, such as
block multiplexing, and (2) those that
are specified in sucha   manner  that  they  
cause program exceptions onSystem/360,   such  as  new  instructions.  REMOVAL   OF   USASCII-8   MODE   System/360   provides  for  USASCII-8   by  a  
mode under control ofPSW   bit  12.  USAS   CII-8   was  a  proposed  zoned-decimal  code  
that has since been rejected. When bit
12 of theSystem/360   PSW   is  one,  the  
preferred codes forUSASCII-8   are  gener  
ated for decimal results. WhenPSW   bit  
12 is zero, the preferred codes forEBCDIC   are   generated.  
InSystem/370,   the   USASCII-8   mode  and  
the associated meaning ofPSW   bit  12  are  
removed. InSystem/370,   all  
instructions whose execution inSystem/360   depends  on  the  setting  of  PSW   bit  12  are   executed  generating  the   preferred  codes  for  EBCDIC.   Bit  12  of  the  PSW   is  System/370   as  follows:  
handled in•   •   In  models  that  do  not  have  the  
translation facility installed, a
one inPSW   bit  position  12  causes  a  
program interruption for specifica
tion exception.
In models that have the translation
facility installed, a one inPSW   bit  position  12  causes  the  CPU   to  
operate in the extended-control(EC)   mode.  OPERATION   CODES   OF   I/O   INSTRUCTIONS   In  System/360,   the  operation  codes  of  
the fourI/O   instructions  (HALT  1/0,   START   I/O,   TEST   CHANNEL,   and  TEST   1/0)   are  one  byte  in  length,  and  bits  8-15  of  
theI/O   instructions  are  ignored.  In  System/370,   the  operation  codes  of  all  I/O   instructions  are   the   first  two  bytes  
of the instruction.System/360   programs  
that executeI/O   instructions  in  which  
any of bits 8-15 is not zero may perform
a different function when executed on aSystem/370   CPU,   as  explained  below.  
InSystem/370,   HALT  I/O   (HIO)   is  
assigned the operation code9EOO   hex  and  
HALTDEVICE   (HDV)   the  operation  code  9E01.   Because  bits  8-14  are  ignored  in  
both instructions, an instruction
executed as HALTI/O   in  System/360   will  
still be executed as HALTI/O   1n  System/370   if  the   third  hex  digit  is  any  
value andthe   fourth  hex   digit   is  an  
even value. However, inSystem/370,   if  
bit 15 of the instruction is one, the
function performed will be theHIO   func  
tion or theHDV   function,  depending  on  
the design of the channel.
InSystem/370,   START  110   is  assigned  the  
operation code9COO   and  RESUME   1/0   is  
assigned the operation code9C02.   Therefore,  an.   instruction  executed  as   START   110   in  System/360   will  be   executed  
asRESUME   110   in   System/370   if  bits  8-15  
of the instruction contain the value02   hex  and  the  suspend-and-resume  facility  
is installed. When the suspend-and
resume facility is installed, operationChanges   Affecting  Compatibility  between  System/360   and  System/370   H-l  
Halt
start
Test
Logout
Validity of Data
This appendix summarizes those changes
included in the
that may affect whether or not a program
written according to the
implementing the
described in this publication. Not
included are descriptions of
sions, that is, (1) those that are
suppressed on initialization, such as
block multiplexing, and (2) those that
are specified in such
cause program exceptions on
mode under control of
that has since been rejected. When bit
12 of the
preferred codes for
ated for decimal results. When
12 is zero, the preferred codes for
In
the associated meaning of
removed. In
instructions whose execution in
handled in
translation facility installed, a
one in
program interruption for specifica
tion exception.
In models that have the translation
facility installed, a one in
operate in the extended-control
the four
the
of the instruction.
that execute
any of bits 8-15 is not zero may perform
a different function when executed on a
In
assigned the operation code
HALT
both instructions, an instruction
executed as HALT
still be executed as HALT
value and
even value. However, in
bit 15 of the instruction is one, the
function performed will be the
tion or the
the design of the channel.
In
operation code
assigned the operation code
as
of the instruction contain the value
is installed. When the suspend-and
resume facility is installed, operation
 
             
            













































































































































































































































































































































































































































































































































































 
             
             
            