control 10-2 for I/O 13-15 privileged-operation exception 6-23
problem state 4-6
bit in BC-mode PSW 4-8
bit in EC-mode PSW 4-6
bit in entry-table entry 5-22
processing backup (synchronous
machine-check condition) 11-19
processing damage (synchronous
machine-check condition) 11-20 processor (See CPU) program
exceptions 6-14
execution of 5-2
initial loading of 4-35
interruption 6-14
for I/O instructions 13-36
imprecise 6-7
priority of 6-30 reset 4-34
signal-processor order 4-39 PROGRAM CALL (PC) instruction 10-25 trace entry 4-14
program check (channel status) 13-70 program-controlled interruption (See PCl)
program-event recording (See PER)
program events (See PER events)
program mask in BC-mode PSW 4-8
in EC-mode PSW 4-7
validity bit for 11-22
program-status word (See PSW) PROGRAM TRANSFER (PT) instruction 10-31 trace entry 4-14
protection (storage) 3-7
during tracing 4-13
fetch (See fetch protection)
key-controlled (See key-controlled
protection)
low-address (See low-address
protection)
segment (See segment protection)
protection check (channel status) 13-71
protection exception 6-23
as an access exception 6-28,6-33
PSTD (primary segment-table designation)
3-24
PSTL (primary segment-table length)
3-24 PSTO (primary segment-table origin)
3-24
PSW (program-status word) 2-3,4-3
assigned storage locations for 3-41 BC-mode 4-8
current 4-3,5-6
stored during interruption 6-2 EC-mode 4-6
exceptions associated with 6-9
format error 6-9
in IPL 4-36
in program execution 5-6
store-status save area for 3-44
validity bits for 11-22
PSW key
in BC-mode PSW 4-8
in EC-mode PSW 4-6
used as access key 3-8
validity bit for 11-22
PSW-key-handling facility 0-4 PSW-key mask (PKM) 5-18
PT (PROGRAM TRANSFER) instruction 10-31 PT-cp (PROGRAM TRANSFER instruction, to
current primary) 10-31 PT-ss (PROGRAM TRANSFER instruction,
with space switching) 10-31 PTL (page-table length) 3-25
PTLB (PURGE TLB) instruction 10-36 PTO (page-table origin) 3-25
publications, other related documents v PURGE TlB (PTLB) instruction 10-36 PX (page index) 3-21
Q
queuing FIFO, example for lock and unlock
A-44 LIFO, example for lock and unlock
A-43
R
start-I/O-fast 13-28
facility 0-4 R field of instruction 5-4
range (of floating-point numbers) 9-1
rate control 12-4 ROD (READ DIRECT) instruction 10-36 read (1/0 command) 13-49
read backward (I/O command) 13-50 READ DIRECT (RDD) instruction 10-36 read-write-direct facility 4-23
real address 3-5
real mode 3-22
real storage 3-5
receiver check (signal-processor status)
4-42
recovery
as class of machine-check condition
11-12
extension facility 0-4 system 11-17
subclass-mask bit for 11-28
redundancy 11-2
reference
bit in storage key 3-6
multiple-access 5-31
recording 3-10 sequence for storage 5-24 (See also sequence)
single-access 5-30 region code 11-26
assigned storage locations for 3-44
validity bit for 11-22
register
base-address 2-4
control 2-4
designation of 5-4
floating-point 2-4
general 2-4
index 2-4
prefix 3-11
save areas 3-44,11-24
validation of 11-9
validity bits for 11-22
vector-facility 2-4
remote operating stations 12-1
repressible machine-check conditions
11-12
reset 4-30 clear 4-34 CPU 4-33
effect on CPU state 4-2
Index X-17

effect on TOO clock 4-24
I/O-system 13-12
as part of subsystem reset 4-34
initial CPU 4-34
initial program 4-34
power on 4-35
program 4-34
selective (I/O) 13-12
subsystem 4-34
summary of functions 4-32
summary of functions performed by
manual initiation of 4-31
system-reset-clear key 12-5
system-reset-normal key 12-5
RESET REFERENCE BIT (RRB) instruction 10-36 RESET REFERENCE BIT EXTENDED (RRBE)
instruction 10-37 resolution
of clock comparator 4-27
of CPU timer 4-28
of interval timer 4-29
of TOD clock 4-24
restart
interruption 6-35
key 12-4
signal-processor order 4-39
result operand 5-2 RESUME I/O (RIO) instruction 13-26
resumption of channel-program execution
13-55
retry CPU 11-3 I/O command 13-53 RIO (RESUME I/O) instruction 13-26
rounding (decimal) 8-10 example A-35
RR instruction format 5-3
RRB (RESET REFERENCE BIT) instruction 10-36 RRBE (RESET REFERENCE BIT EXTENDED)
instruction 10-37 RRE instruction format RS instruction format
running (state of TOO RX instruction format S 5-3
5-3
clock)
5-3
4-24 S (SUBTRACT) binary instruction 7-36 S (suspend) flag in CCW 13-7,13-38 S instruction format 5-3 SAC (SET ADDRESS SPACE CONTROL) instruc­
tion 10-38 SASN (secondary address-space number)
3-13
as part of DAS 5-14
save areas for registers 3-44,11-24 SCK (SET CLOCK) instruction 10-39 SCKC (SET CLOCK COMPARATOR) instruction 10-39 SO (SUBTRACT NORMALIZED) instruction
9-14 SDR (SUBTRACT NORMALIZED) instruction
9-14 SE (SUBTRACT NORMALIZED) instruction
9-14
secondary address space 3-12
as part of DAS 5-14
changing from by DAS 5-15
secondary ASN (SASN) 3-13
as part of DAS 5-14
secondary authority 3-18
X-18 System/370 Principles of Operation exception 6-24
secondary segment table
designation (SSTD) 3-24
length (SSTL) 3-24
origin (SSTO) 3-24
secondary-space-control bit 3-23,5-18
secondary-space mode 3-22
as part of DAS 5-14
secondary virtual address 3-6
effective segment-table designation
for 3-27
segment 3-21
segment index (SX) 3-21
segment-invalid bit (in segment-table
entry) 3-25
segment protection 3-9
exception for 6-23
facility D-4
segment size 3-23
1M-byte optional D-5
segment table 3-25
designation (STD) 3-24
effective 3-27
primary 3-24
secondary 3-24
lookup 3-30 segment-translation exception 6-24
as an access exception 6-28,6-33
selective reset (I/O) 13-12
selector channel 13-4
self-describing block of I/O data 13-42
semiprivileged 5-13
instructions 4-6
descriptions of 10-2 program authorization 5-17
summary of 5-20 programs 4-6,5-17
sense
as an I/O command 13-51
as signal-processor order 4-38
basic 13-51
sense data (I/O) 13-51
sense ID (I/O command) 13-52
sequence
conceptual 5-24
instruction-execution 5-2
of storage references 5-24
OAT-table entries 5-27
instructions 5-26
operands 5-28
storage keys 5-28
sequence code (in limited channel
logout) 13-82 SER (SUBTRACT NORMALIZED) instruction
9-14
serialization 5-33
channel-program 5-34 CPU 5-33
in completion of store operations
5-29
in tracing 4-13
service-processor damage 11-18
service processor inoperative
(signal-processor status) 4-42
service-signal external interruption
6-13
subclass-mask bit for 6-13
service-signal facility D-4 SET ADDRESS SPACE CONTROL (SAC) instruc­
tion 10-38 SET CLOCK (SCK) instruction 10-39 SET CLOCK COMPARATOR (SCKC) instruction 10-39 SET CPU TIMER (SPT) instruction 10-40