Machine Format Op Code 49 4 o o Assembler Format Op Code R
t ,02(X
2
,B 2 ) CH 4,X'30'(0,13) is executed, the contents of locations 16080-16081 are fetched, expanded to 32
bits (the sign bit is propagated to the
left), and compared with the contents of
register 4. Because the two numbers are
equal, condition code 0 is set. COMPARE LOGICAL (CL, CLC, CLI, CLR) The COMPARE LOGICAL instruction differs
from the signed-binary comparison
instructions ec, CH, CR) in that all
quantities are handled as unsigned bina­
ry integers or as unstructured data. CLC Example
The COMPARE LOGICAL (CLC) instruction
can be used to perform the byte-by-byte
comparison of storage fields up to 256
bytes in length. For example, assume
that the following two fields of data
are in storage:
Field 1
1886 1891 1011061C81051E210610516BIC114BIC214BI Field 2 1900 190B I D1 1061C81D51E2106lD516BIC114BIC314BI Also assume:
Register 9 contains 00 00 18 80. Register 7 contains 00 00 19 00. Execution of the instruction:
Machine Format Op Code L 05 OB 9 0061 7 0001 Assembler Format CLC 6(12,9),0(7)
sets condition code I, indicating that
the contents of field 1 are lower in
value than the contents of field 2.
Because the collating sequence of the EBCDIC code is determined simply by a
logical comparison of the bits in the
code, the CLC instruction can be used to
collate EBCOIC-coded fields. For exam­
ple, in EBCDIC, the above two data
fields are:
Field 1: JOHHSOH,A.B. Field 2: JOHHSOH,A.C. Condition code 1 indicates that JOHHSOH,A.B. should precede JOHHSOH,A.C. for the fields to be in alphabetic
sequence. CLI Example
The COMPARE LOGICAL (CLI) instruction
compares a byte from the instruction
stream with a byte from storage. For
example, assume that:
Register 10 contains 00 00 17 00. Storage location 1703 contains 7E.
Execution of the instruction:
Machine Format Op Code 95 AF A
Assembler Format CLI 3(10),X'AF'
sets condition code 1, indicating that
the first operand (the quantity in main
storage) is lower than the second (imme­
diate) operand.
Appendix A. Humber Representation and Instruction-Use Examples A-13

CLR Example
Assume that:
Register 4 contains 00 00 00 01 = 1.
Register 7 contains FF FF FF FF = 2
32 - 1.
Execution of the instruction:
Machine Format Op Code 15 4 7
Assembler Format Op Code R t ,R
2 CLR 4,7
sets condition code 1. Condition code 1
indicates that the first operand is
lower than the second.
If, instead, the signed-binary compar­
ison instruction COMPARE (CR) had been
executed, the contents of register 4
would have been interpreted as +1 and
the contents of register 7 as -1. Thus,
the first operand would have been
higher, so that condition code 2 would
have been set. COMPARE LOGICAL CHARACTERS UNDER MASK (CLM) The COMPARE LOGICAL CHARACTERS UNDER
MASK (CLM) instruction provides a means
of comparing bytes selected from a
general register to a contiguous field
of bytes in storage. The M3 field of
the CLM instruction is a four-bit mask
that selects zero to four bytes from a
general register, each mask bit corre­
sponding, left to right, to a register
byte. In the comparison, the register
bytes corresponding to ones in the mask
are treated as a contiguous field. The
operation proceeds left to right. For
example, assume that:
Storage locations 10200-10202 contain FO BC 7B.
A-14 System/370 Principles of Operation Register 12 contains 00 01 00 00. Register 6 contains FO BC 5C 7B.
Execution of the instruction:
Machine Format Op Code BD 6 D
Assembler Format CLM 6,B'1101',X'200'(12) causes the following comparison:
Register 6: FO BC 5C 7B
Mask M3: 1 1 0 1 FO BC 7B
Storage I ; I locations 10200-10202: FO BC 7B
Because the selected bytes are equal,
condition code 0 is set. COMPARE LOGICAL LONG (CLCL) The COMPARE LOGICAL LONG (CLCL) instruc­
tion is used to compare two operands in
storage, byte by byte. Each operand can
be of any length. Two even-odd pairs of
general registers (four registers in
all) are used to locate the operands and
to control the execution of the CLCL instruction, as illustrated in the
following diagram. The first register
of each pair must be an even register,
and it contains the storage address of
an operand. The odd register of each
pair contains the length of the operand
it covers, and the leftmost byte of the
second-operand odd register contains a
padding byte which is used to extend the
shorter operand, if any, to the same
length as the longer operand.
The following illustrates the assignment
of registers: