LOGOUT CONTROLS Control register 14 contains bits which
control when a logout may occuri it has
the following format: I
I
/Jill[F L L L L
/
1 2 8 9
Synchronous Machine-Check
Extended-Logout Control
Bit 1 CSL) of control register 14
controls the logout action during a
machine-check interruption. When this
bit is one, the machine-check extended­
logout area may be changed during the
interruptioni when this bit is zero, the
area may be changed only under control
of the asynchronous machine-check
extended-logout-control bit, bit 8 of
control register 14. Bit 1 of control
register 14 is initialized to one.
Input/Output Extended-Logout Control Bit 2 (Il) of control register 14, when one, permits channel logout into the I/O extended-logout area. When this bit is
zero, I/O extended logouts cannot occur.
Bit 2 of control register 14 is initial­
ized to zero.
Asynchronous Machine-Check
Extended-Logout Control Bit 8 (AL) of control register 14, in
conjunction with PSW bit 13, controls
asynchronous change of the machine-check
extended-logout area. When this bit and PSW bit 13 are both ones, the machine
may change the machine-check extended­
logout area at any time; when this bit
is zero, the area may be changed only
under control of the synchronous
machine-check extended-logout-control
bit, bit 1 of control register 14. Bit
8 of control register 14 is initialized
to zero.
Asynchronous Fixed-Logout Control Bit 9 (FL) of control register 14, when one, permits the fixed-logout area to be
changed at any time. When this bit is
zero, the fixed-logout area may be
changed only during a machine-check
interruption or during an I/O inter­
ruption. Bit 9 of control register 14
is initialized to zero. MACHINE-CHECK EXTENDED-LOGOUT ADDRESS
Control register 15 contains the
machine-check extended-logout address
and has the following format: MCEL Address
o 8 29 31
Bits 8-28 of control register 15, with
three rightmost zeros appended, desig­
nate the starting real location of the
machine-check extended-logout (MCEl) area. The contents of control register
15 are initialized by setting bit 22 to
one and all other bits to zeros, which
specifies a starting address of 512
(decimal). When extended real address­
ing is installed, the MCEl address is
still a 24-bit real address and is
extended on the left with zeros. Thus,
the machine-check extended logout can
wrap from real location 224 -1 to real
location O. When a model provides the machine-check
extended logout (MCEl), control register
15 is implemented. Programming Notes
1. The availability and extent of the
machine-check area
differs among models and, for any
particular model, may depend on the
facilities or engineering changes
installed. In order to provide for
such variations, the program should
determine the extent of the logout
by means of STORE CPU 10 whenever a
storage area for the extended
logout is to be assigned. A length
of zero in the MCEL field that
results from executing STORE CPU 10 indicates that no MCEL is provided.
2. The maximum logout information is
obtained by setting both the
synchronous and asynchronous
machine-check extended-logout-
control bits to ones. Both of
these bits must be zeros to prevent
any changes to the machine-check
extended-logout area.
3. Use of the machine-check extended­
logout area while asynchronous
machine-check extended logout is
allowed may produce unpredictable
results.
Chapter 11. Machine-Check Handling 11-29
4. When the asynchronous fixed-
logout-control bit is one, program
use of the fixed-logout area should
be restricted to the fetching of
data from this area. CPU programs
or channel programs storing into
the fixed-logout area may cause
machine checks or undetected errors
if the store occurs during CPU
retry. Note that this is £ill excep­
tion to the rule that programming
errors do not cause machine-check indicatTOns-.-- -----
SUMMARY OF MACHINE-CHECK MASKING AND LOGOUT A summary
logout is figures.
of machine-check masking and g1ven in the following three
Action When CPU Disabled for
Machine-Check Condition Subclass and
Sub-
MCIC Class Check-Stop Check-Stop
Bit Subclass Mask Ctrl = 0 Ctrl 0 System damage - p* Check
1 Instruction-processing damage - p* Check
2 System recovery RM Y 3 Interval-timer damage EM P
4 Timing-facility damage EM P 5 External damage EM P 6 Vector-facility failure - P 7 Degradation OM P 8 Warning WM P 10 Service-processor damage - P Explanation: * System integrity may have been lost, and the system
cannot be considered dependable.
- The condition does not have a subclass mask. P Indication is held pending. Y Indication may be held pending or may be discarded. OM Degradation subclass mask (bit 5 of CR14). EM External-damage subclass mask (bit 6 of CR14).
RM Recovery subclass mask (bit 4 of CR14).
WM Warning subclass mask (bit 7 of CR14).
Machine-Cheek-Condition Masking 11-30 System/370 Principles of Operation Y P P P
P P P
P
= 1
stop
stop
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