models may accept the status into the
subchannel. AiternativelY1 some models
may signal the device to hold the status
until the channel is capable of causing
an interruption. In this case1 the
channel selects the device to obtain the
status when the interruption occurs.
The status stored by the channel is the
status presented by the device at inter­
ruption time and1 because of changed
conditions at the device, may not be the
same status presented by the device
initially. Specifically, a status of
zero, busy, or busy and status modifier
may be stored.
When the channel detects any of the
following, it generates an interruption
condition without necessarily communi­
cating with or having received the
status byte from the device: • PCl flag in a CCW • Termination of a burst operation by
HALT I/O or HALT DEVICE on a selec­
tor channel • Channel-available
(CAl)
interruption • A programming error associated with
the CCW or first IDAW following the SIOF function • The device not operational after
condition code 0 is set for an SIOF or RIO function.
The interruption conditions from the channel1 except for CAl, can be accompa­
nied by other channel-status
indications, but none of the device
status bits is on when the channel
initiates the interruption in this case.
Channel-Available Interruption
The channel-available-interruption (CAl)
condition is provided on all block­
multiplexer channels and all channels
that provide start-I/O-fast queuing for
one or more subchannels. The CAl condi­
tion causes the entire CSW to be
replaced by a new set of bits. All
fields of the CSW are set to zero. The I/O address stored contains a zero
device address and a channel address
identifying the interrupting channel.
A channel which provides the channel­
available-interruption condition gener­
ates the CAl condition if it previously
had responded with a condition code 2 to
an I/O instruction other than HALT I/O or HALT DEVICE and if the working state
thus indicated no longer exists. When
the working state which caused condition
code 2 was due to a subchannel busy with
a device other than the one addressed1 the conclusion eof the working state is
not signaled by a CAl. Some channels
may generate the CAl condition in the
following situations:
1. The channel is unable to retrieve
status from the I/O device because
the I/O device appeared not opera­
tional when the channel was allowed
to cause an interruption.
2. The channel had previously
responded with a condition code 1
to a TEST CHANNEL instruction.
A channel that provides start-I/O-fast
queuing also generates the CAl condition
in the following situation. If a
control-unit-busy condition has been
signaled to the program by storing a CSW, either during the execution of
START I/O or START I/O FAST RELEASE, or
during an I/O interruption subsequent to
setting condition code 0 for START I/O FAST RELEASE executed independent of the device1 the control unit subsequently
generates the control-unit-end condition
to signal that the control unit is now
available. The control unit may associ­
ate the control-unit-end status with any
device address that the control unit is
capable of recognizing to present the
status to the channel. When the device
address used by the control unit to
present the control-unit-end status (in
the absence of any other status indi­
cation) is associated with a subchannel
that is working and has an I/O operation
pending at the subchannel or has a
suspended channel-program execution, the
subchannel is not made interruption­
pending with the control-unit-end
status. Instead, the channel recognizes
the CAl condition. The control-unit-end
status is discarded in this case and the
state of the subchannel associated with
the device address remains unchanged.
Since any other interruption condition
(except PCI) accomplishes the same func­
tion as CAI 1 a CAl condition is reset
upon the occurrence of any interruption
(except PCl) on that channel. Some
channels also reset a CAl condition when
another interruption condition (except PCl) is cleared by a TEST I/O or CLEAR I/O on the same channel. The occurrence
of another channel-working state before
the CAl causes the CAl condition to be
suspended until the working state ends.
Programming Note
The CAl can be used as a tool for keep­
ing I/O requests in sequence by using it
in conjunction with TEST CHANNEL. The
CAl condition pending in a channel does
not cause the rejection of a subsequent
START I/O or START I/O FAST RELEASE but
does cause a condition code 1 to be
returned to TEST CHANNEL. A channel
which responded with condition code 1 or
Chapter 13. Input/Output Operations 13-61

2 because the channel was interruption­
pending or busy does not subsequently
respond with a condition code 0 to a
TEST CHANNEL without clearing an inter­
ruption condition in the interim. PRIORITY OF INTERRUPTIONS Generation of interruption conditions is
asynchronous to the activity in the CPU, and interruption conditions associated
with more than one I/O device can exist
at the same time. The priority among
interruption conditions is controlled by
two types of mechanisms --one estab­
lishes the priority among interruption
conditions within a channel, and another
establishes priority among interruption
conditions from different channels. A
channel requests an I/O interruption
only after it has established priority
among interruption conditions. The
status associated with interruption
conditions is preserved in the devices
or channels until accepted by the CPU. Assignment of priority among requests
for interruption associated with devices
on anyone channel is a function of the
type of channel, the type of inter­
ruption condition, and the method of
attaching the device to the channel. A
device's priority is not related to its
device address. Interruption conditions
from different devices do not necessar­
ily occur in the sequence in which they
are generated. However, multiple inter­
ruption conditions for a single device
are presented in the sequence in which
they are generated.
The priorities among requests for I/O interruptions from different channels
are unpredictable. The priority assign­
ment need not be dependent on the chan­
nel address or type.
Interruption Action
An I/O interruption can occur only when
the CPU is enabled for I/O interruptions. The interruption occurs at the completion of a unit of
operation. If a channel has established
the priority among interruption condi­
tions, while the CPU is disabled for I/O interruptions, the interruption occurs
immediately after the completion of the
instruction enabling the CPU and before
the next instruction is executed. This
interruption is associated with the
highest priority condition for the chan­
nel. If interruptions are allowed from
more than one channel concurrently, the
interruption occurs from the channel
having the highest priority among those
requesting interruption.
13-62 System/370 Principles of Operation If the priority among interruption
conditions has not yet been established
in the channel by the time the inter­
ruption is allowed, the interruption
does not necessarily occur immediately
after the completion of the instruction
enabling the CPU. This delay can occur
regardless of how long the interruption
condition has existed in the device or
the subchannel.
The interruption causes the current
program-status word (PSW) to be stored
as the old PSW at real storage location
56 and causes the CSW associated with
the interruption to be stored at real
storage location 64. In EC mode, the
measurement byte is stored at real stor­
age location 185, and the channel and
device causing the interruption are
identified by the I/O address which is
stored at real storage locations
186-187. In BC mode, the channel and
device causing the interruption are
identified by the I/O address in bit
positions 16-31 of the I/O old PSW.
If a limited-channel
it is stored at real
176-179.
logout is present,
storage locations
A new PSW is loaded from real storage
location 120. Subsequently, processing
resumes in the state indicated by this
PSW. The CSW associated with the inter­
ruption identifies the interruption
condition responsible for the inter­
ruption and provides further details
about the progress of the operation and
the status of the device.
Programming Note
When a control unit which is shared
among a number of I/O devices which are
concurrently executing operations such
as rewinding tape or positioning a
disk-access mechanism, the initial
device-end signals generated on
completion of the operations are
provided in the order of generation,
unless command chaining is specified for
the operation last initiated. In the
latter case, the control unit provides
the device-end signal for the last
initiated operation first, and the other
signals are delayed until the subchannel
is freed. Whenever interruptions due to
the device-end signals are delayed
because the CPU is disabled for I/O interruptions or the subchannel is busy,
the original order of the signals is
destroyed. CHANNEL-STATUS WORD The channel-status word (CSW) provides
to the program the status of an I/O