Machine Format Op Code R
t
44 1° A 0001 Assembler Format
EX1,0(0,10) where register 10 contains 00 00 38 20 and register 1 contains 00 OF FO 03. When the instruction at 5000 is
executed, the rightmost byte of register
1 is ORed with the second byte of the
target instruction:
Instruction byte:
Register byte:0000 0000{2} = 00 0000 0011{2} = 03 Result: 0000 0011{2} = 03 causing the instruction at 3820 to
executed as if it originally were:
Machine FormatOp Code L Bt Dt B2 O 2 02 03 C 003
1 0 0001 Assembler Format MVC 3(4,12),0(13) However, after execution:
Register 1 is unchanged.
be
The instruction at3820 is unchanged.
The contents of the four bytes starting
at location90AO have been moved to
the four bytes starting at location
8916.
TheCPU next executes the instruction
at address5004 (PSW bits 40-63 contain 00 50 04). INSERT CHARACTERS UNDER MASK (ICM) The INSERT CHARACTERS UNDER MASK (ICM) instruction may be used to replace all or selected bytes in a general register
with bytes from storage and to set the
condition code to indicate the value of
the inserted field.
For example, if it is desired to insert
a three-byte address from FIELDA into
register 5 and leave the leftmost byte
of the register unchanged, assume:
Machine FormatOp Code BF 5 7 * * * * Assembler Format ICM 5,B'0111',FIELDA FIELDA:
Register 5 (before):
Register 5 (after):Condition code (after):
As another example:
Machine FormatOp Code FE DC BA
12 34 56 78
12 FEDC BA
1 (leftmost
bit of
inserted
field is
one)
BF 6 9* * * * Assembler Format ICM 6,B'1001',FIELDB FIELDB:
Register 6 (before):
Register 6 (after):Condition code (after):
12 3400 00 00 00 12 00 00 34
2 (inserted
field is
nonzero
with left
most zero
bit)
When the mask field contains 1111, theICM instruction produces the same result
asLOAD (L) (provided that the indexing
capability of the RX format is not need
ed), except that IeM also sets the
condition code. The condition-code
setting is useful when an all-zero field
(condition code0) or a leftmost one bit
(condition code 1) is used as a flag.
Appendix A. Number Representation andInstruction-Use Examples A-19
t
44 1
EX
executed, the rightmost byte of register
1 is ORed with the second byte of the
target instruction:
Instruction byte:
Register byte:
executed as if it originally were:
Machine Format
1
Register 1 is unchanged.
be
The instruction at
The contents of the four bytes starting
at location
the four bytes starting at location
8916.
The
at address
with bytes from storage and to set the
condition code to indicate the value of
the inserted field.
For example, if it is desired to insert
a three-byte address from FIELDA into
register 5 and leave the leftmost byte
of the register unchanged, assume:
Machine Format
Register 5 (before):
Register 5 (after):
As another example:
Machine Format
12 34 56 78
12 FE
1 (leftmost
bit of
inserted
field is
one)
BF 6 9
Register 6 (before):
Register 6 (after):
12 34
2 (inserted
field is
nonzero
with left
most zero
bit)
When the mask field contains 1111, the
as
capability of the RX format is not need
ed), except that IeM also sets the
condition code. The condition-code
setting is useful when an all-zero field
(condition code
(condition code 1) is used as a flag.
Appendix A. Number Representation and