Register 8:
FIELD3 (before):
FIELD3 (after):
12 34 56 78
not significant
34 56 78
As another example:
Machine FormatOp Code 8E 9 5 * * * * Register Format STCM 9,8'0101',FIELD2 Register 9: 01 23 45 67
FIELD2 (before): not significant
FIELD2 (after): 23 67STORE MULTIPLE (STM)
Assume that the contents of general
registers 14, 15,0, and 1 are to be
storedin consecutive four-byte fields
startingwith location 4050 and that:
Register 14 contains00 00 25 63.
Register 15 contains00 01 27 36.
Register0 contains 12 43 00 62.
Register 1 contains 73 26 12 57.
Register 6 contains00 00 40 00. The initial contents of locations 4050-405F are not significant.
The STORE MULTIPLE instruction allows
the use of just one instruction to store
the contents of the four registers:
Machine FormatOp Code 90 E 1 6 050
1 Assembler Format
STM 14,1,X'50'(6)
After the instruction is executed:
Locations4050-4053 contain 00 00 25
63.
Locations4054-4057 contain 00 01 27
36.
Locations4058-4058 contain 12 43 00 62.
Locations405C-405F contain 73 26 12
57.
TEST UNDER MASK (TM)
The TEST UNDER MASK instruction examines
selected bits of a byte and sets the
condition code accordingly. For
example, assume that:
Storage location 9999 contains F8.
Register 7 contains00 00 99 90. Assume the instruction to be:
Machine FormatOp Code 91 C3 7
Assembler Format
TM9(7),8'11000011' The instruction tests only those bits of
the bytein storage for which the mask
bits are ones:
F8 = 11111011{2} Mask = 1100 0011{2} Test = 11xx xx11{2} Condition code 3 is set: all selected
bits in the test result are ones. (The
bits marked "x" are ignored.)
If location 9999 had contained 89, the
test would have been:
89 =1011 1001{2} Mask = 1100 0011{2} Test = 10xx xx01{2} Condition code 1 is set: the selected
bits are both zeros and ones.
If location 9999 had contained3C, the
test would have been:3C = 0011 1100{2} Mask = 1100 0011{2} Test = OOxx xxOO{2} Condition code 0 is set:
bits are zeros.
all selected
Note: Storage location 9999 remains
unchanged.
Appendix A. Number Representation and Instruction-Use Examples A-27
FIELD3 (before):
FIELD3 (after):
12 34 56 78
not significant
34 56 78
As another example:
Machine Format
FIELD2 (before): not significant
FIELD2 (after): 23 67
Assume that the contents of general
registers 14, 15,
stored
starting
Register 14 contains
Register 15 contains
Register
Register 1 contains 73 26 12 57.
Register 6 contains
The STORE MULTIPLE instruction allows
the use of just one instruction to store
the contents of the four registers:
Machine Format
1
STM 14,1,X'50'(6)
After the instruction is executed:
Locations
63.
Locations
36.
Locations
Locations
57.
TEST UNDER MASK (TM)
The TEST UNDER MASK instruction examines
selected bits of a byte and sets the
condition code accordingly. For
example, assume that:
Storage location 9999 contains F8.
Register 7 contains
Machine Format
Assembler Format
TM
the byte
bits are ones:
F8 = 1111
bits in the test result are ones. (The
bits marked "x" are ignored.)
If location 9999 had contained 89, the
test would have been:
89 =
bits are both zeros and ones.
If location 9999 had contained
test would have been:
bits are zeros.
all selected
Note: Storage location 9999 remains
unchanged.
Appendix A. Number Representation and Instruction-Use Examples A-27