The following figures list instructions
by name, mnemonic, operation code, and
facility. Some models may offer
instructions that do not appear in the
figures, such as those provided for
assists or as part of special or custom
features.
The operation codes for the vector facility are not included in this appen­
dix. See the pUblication IBM System/370
Vector Operations, SA22-7125, for opera­
tion codes associated with this facility.
The operation code 00 hex with a
two-byte instruction format is allocated
for use by the program when an indi­
cation of an invalid operation is
required. It is improbable that this
operation code will ever be assigned to
an instruction implemented in the CPU. Explanation of Symbols in "Character­ istics" and Code" Columns 9 Causes serialization and checkpoint
synchronization. 9
1
Causes serialization and checkpoint
synchronization when the Mt and R2 fields contain all ones and all
zeros, respectively.
$ Causes serialization. * The handling of bits 8-15 of the
operation code for some of the I/O
instructions depends on the
instruction and the facilities installed. See the description of
the instruction for details.
A Access exceptions for logical
addresses.
Al Access exceptions; not all access
exceptions may occur; see instruc­ tion description for details.
AI Access exceptions for instruction
address.
AS Access exceptions and ASN­
translation-specification
exception; see instruction descrip­
tion for details.
AT ASN-translation exceptions (which
include addressing, ASN-translation
specification, AFX translation, and
ASX translation>.
B PER branch event.
BS Branch-and-save facility.
C Condition code is set.
CK CPU-timer and clock-comparator
facility.
CS Channel-set-switching facility.
D Data exception.
DC Direct-control facility.
DF Decimal-overflow exception.
DK Decimal-divide exception.
DM Depending on the model, DIAGNOSE
may generate various program
exceptions and may change the
condition code.
DU Dual-address-space facility.
EF Extended facility.
EK
EO
EU
EX
FK FP GO Gl
G2
GM
IF
II
IK
L
LS
MI
MO MP P PK Q
R
RE
RR
RRE
RS
RX
S
SD
SI SO SP SR
SS
SSE
ST
SW
T
TB
TR XP APPENDIX LISTS OF INSTRUCTIONS
Storage-key-instruction-extension
facility.
Exponent-overflow exception.
Exponent-underflow exception.
Execute exception.
Floating-point-divide exception.
Floating-point facility.
Instruction execution includes the
implied use of general register O. Instruction execution includes the
implied use of general register I. Instruction execution includes the
implied use of general register 2.
Instruction execution includes the
implied use of multiple general
registers.
Fixed-point-overflow exception.
Interruptible instruction.
Fixed-point-divide exception.
New condition code is loaded.
Significance exception.
Move-inverse facility.
Monitor event.
Multiprocessing facility.
Privileged-operation exception.
PSW-key-handling facility.
Privileged-operation exception for
semiprivileged instructions. PER general-register-alteration
event.
Recovery-extension facility.
RR instruction format.
RRE instruction format.
RS instruction format.
RX instruction format.
S instruction format. PER storage-alteration event, which
can be caused by READ DIRECT only
when INVALIDATE PAGE TABLE ENTRY is
not installed.
SI instruction format.
Special-operation exception.
Specification exception.
Suspend-and-resume facility.
SS instruction format.
SSE instruction format. PER storage-alteration event.
Conditional-swapping facility.
Trace exceptions (which include
access and specification).
Test-block facility.
Translation facility.
Extended-precision floating-point
facility.
Additional exceptions and events
for PROGRAM CALL (which include
addressing, EX translation, LX
translation, PC-translation speci­
fication, and special-operation
exceptions and space-switch event).
Additional exceptions and events
for PROGRAM TRANSFER (which include
addressing, primary authority, and
special-operation exceptions and
space-switch event).
Additional exceptions for SET
SECONDARY ASN (which include ad­
dressing, secondary authority, and
special operation).
Appendix B. Lists of Instructions B-1
Mne- Op Page Name monic Characteristics Code No. ADD AR RR C IF R lA 7-7
ADD A RX C A IF R SA 7-7
ADD DECIMAL AP 55 C A D DF ST FA 8-5
ADD HALFWORD AH RX C A IF R 4A 7-7
ADD LOGICAL ALR RR C R IE 7-8
ADD LOGICAL AL RX C A R 5E 7-8
ADD NORMALIZED (extended) AXR RR C XP SP EU EO LS 36 9-6
ADD NORMALIZED (long) ADR RR C FP SP EU EO LS 2A 9-6
ADD NORMALIZED (long) AD RX C FP A SP EU EO LS 6A 9-6
ADD NORMALIZED (short) AER RR C FP SP EU EO LS 3A 9-6 ! ADD NORMALIZED (short) AE RX C FP A SP EU EO LS 7A 9-6
ADD UNNORMALIZED (long) AWR RR C FP SP EO LS 2E 9-7
ADD UNNORMALIZED (long) AW RX C FP A SP EO LS 6E 9-7
ADD UNNORMALIZED (short) AUR RR C FP SP EO LS 3E 9-7
ADD UNNORMALIZED (short) AU RX C FP A SP EO LS 7E 9-7 AND NR RR C R 14 7-8 AND N RX C A R 54 7-8 AND (character) NC 55 C A ST D4 7-8 AND (immediate) NI 51 C A ST 94 7-8 BRANCH AND LINK BALR RR B R 05 7-9 BRANCH AND LINK BAL RX B R 45 7-9 BRANCH AND SAVE BA5R RR BS B R OD 7-9 BRANCH AND SAVE BAS RX BS B R 4D 7-9 BRANCH ON CONDITION BCR RR ¢1 B 07 7-10 BRANCH ON CONDITION BC RX B 47 7-10 BRANCH ON COUNT BCTR RR B R 06 7-11 BRANCH ON COUNT BCT RX B R 46 7-11 BRANCH ON INDEX HIGH BXH RS B R 86 7-11 BRANCH ON INDEX LOW OR EQUAL BXLE RS B R 87 7-11 CLEAR CHANNEL CLRCH S C RE P ¢ 9FOl* 13-16 CLEAR I/O CLRIO 5 C P ¢ 9DOHE 13-17 COMPARE CR RR C 19 7-12 COMPARE C RX C A 59 7-12 COMPARE (long) CDR RR C FP SP 29 9-8 COMPARE (long) CD RX C FP A SP 69 9-8 COMPARE (short) CER RR C FP SP 39 9-8 Cor1PARE (short) CE RX C FP A SP 79 9-8 COMPARE AND SWAP CS RS C SW A SP $ R ST BA 7-12 COMPARE DECIMAL CP SS C A D F9 8-5 COMPARE DOUBLE AND SWAP CDS RS C SW A SP $ R ST BB 7-12 COMPARE HAlFWORD CH RX C A 49 7-14 COMPARE LOGICAL CLR RR C 15 7-14 COMPARE LOGICAL CL RX C A 55 7-14 COMPARE LOGICAL (character) ClC SS C A D5 7-14 COMPARE LOGICAL (immediate) ClI SI C A 95 7-14 COMPARE LOGICAL C. UNDER MASK CLM RS C A BD 7-15 COMPARE LOGICAL LONG CLCL RR C A SP II R OF 7-15 CONNECT CHANNEL SET CONCS 5 C CS P $ B200 10-4 CONVERT TO BINARY CVB RX A D IK R 4F 7-16 CONVERT TO DECIMAL CVD RX A ST 4E 7-17 DIAGNOSE DM P DM 83 10-5 DISCONNECT CHANNEL SET DISCS S C CS P $ B201 10-6 DIVIDE DR RR SP IK R ID 7-17
DIVIDE D RX A SP IK R 5D 7-17
DIVIDE (long) DDR RR FP SP EU EO FK 2D 9-9
Instructions Arranged by Name (Part 1 of 4)
B-2 System/370 Principles of Operation
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