D
D (DIVIDE) binary instruction 7-17 example A-16
D field of instruction 5-5 damage code (external) 11-24
validity bit for 11-22 external 11-18
mask bit for 11-28
instruction-processing 11-17
interval-timer 11-17
processing 11-20
service-processor 11-18
system 11-16
timing-facility 11-17
DAS (dual-address-space) facility
D-2,5-13
authorization mechanisms 5-17
summary of 5-20 tracing (See tracing)
DAT (See dynamic address translation)
DAT mode (bit in PSW) 4-6 use in address translation 3-22
data
format for
decimal instructions 8-1
floating-point instructions 9-2 general instructions 7-2 I/O-sense 13-51
prefetching of for output operation 13-40 transfer (I/O), conclusion of 13-56
data block (See block of I/O data)
data chaining of CCWs 13-6,13-42
as cause of chaining check 13-72 CCW prefetch for 13-42
chain-data (CD) flag in CCW 13-6,13-38
effect on compatibility of 13-8
data check (bit in I/O-sense data)
13-51
data exception 6-18
DD (DIVIDE) floating-point instruction
9-9
DDR (DIVIDE) floating-point instruction
9-9
DE (DIVIDE) floating-point instruction
9-9
decimal
arithmetic 8-2
comparison 8-5
digit codes 8-2
divide exception 6-19
instructions 8-1 examples A-30 number representation 8-1 examples A-5
operand overlap 8-3
overflow
exception 6-19
mask in BC-mode PSW 4-8
mask in EC-mode PSW 4-7
sign codes 8-2
tables for conversion to hexadecimal
F-1
decimal-to-binary conversion 7-16
example A-16
deferred condition code (in CSW) 13-63
contents of 13-74
for SIOF function 13-29
degradation (machine-check condition)
11-18
subclass-mask bit for 11-28
degradation, storage (machine-check
condition) 11-21
delay code in I/O-communication area
13-83
delay in storing 5-29
delayed (machine-check condition) 11-19
delayed access exception (machine-check
condition) 11-19
deletion of malfunctioning unit 11-4
DER (DIVIDE) floating-point instruction
9-9
examples A-37
designation
authority-table 3-14
effective segment-table 3-27
entry-table 5-21
linkage-table 5-21
in AST entry 3-15
page-table 3-25
primary segment-table 3-24
secondary segment-table 3-24
segment-table 3-24
in AST entry 3-14
destructive overlap 5-32,7-25
detect field (in limited channel logout)
13-81 device 2-6,13-2
console 12-1
not-ready state of 13-10 status of 13-51
used for IPL 4-36
device address 13-8,13-15 device busy (unit status) 13-29
device end (unit status) 13-29,13-67
device error 13-15
device-working state (I/O-system state) 13-10 DIAGNOSE instruction 10-5 digit codes (decimal) 8-2
digit selector (in EDIT) 8-7
direct-access storage 3-2
direct control 4-23
facility D-2
disabling for interruptions 6-6
disabling of interval timer 4-29
disallowed interruptions 6-6 DISCONNECT CHANNEL SET (DISCS) instruc-
tion 10-6 DISCS (DISCONNECT CHANNEL SET) instruc­
tion 10-6 displacement (in relative addressing)
5-5
display (manual controls) 12-2
DIVIDE (D,DR) binary instructions 7-17
example A-16
DIVIDE (DD,DDR,DE,DER) floating-point
instructions 9-9
examples A-37
DIVIDE DECIMAL (DP) instruction 8-5
example A-31
divide exception
decimal 6-19
fixed-point 6-20 floating-point 6-20 divisible instruction execution 5-25
doubleword 3-3
doubleword-concurrent storage references
5-31
DP (DIVIDE DECIMAL) instruction 8-5
example A-31
DR (DIVIDE) binary instruction 7-17
dual-address-space facility (See DAS)
dump (standalone) 12-5
dynamic address translation (DAT) 3-20 Index X-7

E
by LOAD REAL ADDRESS instruction 10-21 control of 3-22
explicit and implicit 3-27
mode bit in PSW 4-6
use in address translation 3-22
sequence of table fetches 5-27
early exception recognition 6-9
EBCDIC (Extended Binary-Coded-Decimal
Interchange Code)
architecture designed for iv character code, chart for G-1
EC (extended-control) mode 4-4
control bit in PSW 4-6,4-8 PSW format in 4-6
ECC (error checking and correction)
11-2
ED (EDIT) instruction 8-6
examples A-31
EDIT (ED) instruction 8-6
examples A-31
EDIT AND MARK (EDMK) instruction 8-9
example A-33
editing instructions 8-3
(See also ED instruction, EDMK
instruction)
EDMK (EDIT AND MARK) instruction 8-9
example A-33
effective address 3-6
used for storage interlocks 5-25
effective segment-table designation
3-27
EKM (entry key mask) 5-22
emergency signal (external interruption)
6-11
signal-processor order 4-39
enabling for interruptions 6-6
ending of I/O operations 13-54
ending of instruction execution 5-8
entry in trace table 4-14
entry index (EX) 5-21
entry key mask (EKM) 5-22
entry table (ET) 5-22
designation 5-21 EPAR (EXTRACT PRIMARY ASN) instruction 10-6 epoch (for TOO clock) 4-25
equipment check
bit in I/O-sense data 13-51
in signal-processor status 4-41
error
alert (in limited channel logout)
13-82
channel-equipment 13-14
channel-programming 13-14
checking and correction 11-2
device 13-15
from DIAGNOSE instruction 10-5 indirect storage 11-21
intermittent 11-5 PSW-format 6-9
solid 11-5
state of TOO clock 4-25
storage 11-20 storage-key 11-21
ESAR (EXTRACT SECONDARY ASH) instruction 10-7 ET (entry table) 5-22
ETL (entry-table length) 5-21
ETO (entry-table origin) 5-21
X-8 System/370 Principles of Operation
event 6-14
monitor 7-23
PER 4-15
space-switch 6-25
EX (entry index) 5-21
translation exception 6-20 EX (EXECUTE) (See EXECUTE instruction)
exception-extension code 6-15
exceptions 6-14
access (collective
program-interruption name)
6-28,6-33
addressing 6-15
AFX-translation 6-18
ASN-translation (collective
program-interruption name) 6-35
ASN-translation-specification 6-18
ASX-translation 6-18
data (decimal) 6-18
decimal-divide 6-19
decimal-overflow 6-19
delayed access (machine-check condi-
tion) 11-19
during translation 3-31
EX-translation 6-20 execute 6-19
exponent-overflow 6-19
exponent-underflow 6-19
fixed-point-divide 6-20 fixed-poi nt-overflow 6-20 floating-point-divide 6-20 LX-translation 6-20 operation 6-21
page-translation 6-22
PC-translation-specification 6-22
primary-authority 6-23
privileged-operation 6-23
for I/O instructions 13-36
protection 6-23 PSW-related 6-9
recognition of, early and late 6-9
secondary-authority 6-24
segment-translation 6-24
significance 6-25
special-operation 6-25
specification 6-26
trace (collective
program-interruption name) 6-35
translation-specification 6-27
unnormalized-operand 6-27
vector-operation 6-28
EXCLUSIVE OR (X,XC,XI,XR) instructions
7-18
examples A-17
EXECUTE (EX) instruction 7-19
effect of address comparison on 12-1
example A-18
exceptions while fetching target 6-8 PER event for target of 4-19
execute exception 6-19
exigent machine-check conditions 11-11
explicit address translation 3-27
exponent 9-1
(See also floating point)
overflow 9-1
exception 6-19
underflow 9-1
exception 6-19
mask in BC-mode PSW 4-8
mask in EC-mode PSW 4-7
extended control (See EC mode)
extended facility D-3
extended floating-point number 9-2
extended logout