M [RX]
o 8 12 16 20 The second word of the first
(multiplicand) is multiplied
second operand (multiplier),
doubleword product is placed
first-operand location.
31
operand
by the
and the
at the
The R! field designates an even-odd pair
of general registers and must designate
an even-numbered register; otherwise, a specification exception is recognized.
Both the multiplicand and multiplier are
treated as 32-bit signed binary
integers. The multiplicand is taken
from general register R! + 1. The
contents of general register R! are
ignored. The product is a 64-bit signed
binary integer, which replaces the
contents of the even-odd pair of general
registers designated by R I • An overflow
cannot occur.
The sign of the product is determined by
the rules of algebra from the multiplier
and multiplicand sign, except that a
zero result is always positive. Condition Code: unchanged.
Program Exceptions:
The code remains
Access (fetch, operand 2 of M only)
Specification
Programming Notes 1. An example of the use of the MULTI­ PLY instruction is given in Appen­
dix A.
2. The significant part of the product
usually occupies 62 bits or fewer.
plier), and the product is placed
first-operand location. The
operand is two bytes in length
considered to be a 16-bit signed
integer.
at the
second
and is
binary
The multiplicand is treated as a 32-bit
signed binary integer and is replaced by
the rightmost 32 bits of the signed­
binary-integer product. The bits to the
left of the 32 rightmost bits of the
product are not tested for significance;
no overflow indication is given.
The sign of the product is determined by
the rules of algebra from the multiplier
and multiplicand sign, except that a zero result is always positive. Condition Code: unchanged. Program Exceptions:
The code
Access (fetch, operand 2)
Programming Notes
remains
1. An example of the use of the MULTI­ PLY HALFWORO instruction is given
in Appendix A.
2. The significant part of the product
usually occupies 46 bits or fewer. Only when two maximum negative
numbers are multiplied are 47
significant product bits formed.
Since the rightmost 32 bits of the
product are stored unchanged,
ignoring all bits to the left, the
sign bit of the result may differ
from the true sign of the product
in the case of overflow. For a negative product, the 32 bits
placed in register Rt are the
rightmost part of the product in
two's-complement notation. Only when two maximum negative OR numbers are multiplied are 63
significant product bits formed. MULTIPLY HALFWORD MH R! ,D
2
(X
2
,B
2
) [RX] '4C' I R! I X
2 I B2 O 2 0 8 12 16 20 31
The first operand (multiplicand) is
multiplied by the second operand (multi- OR 0 0 0 [RR]
' 16 ' I R! I R2 8 12 15 R
l1 D
2
(X
2
,B
2
) [RX]
'56' I R! I X 2 I B2 D2 8 12 16 20 31 Chapter 7. General Instructions 7-29

o 8 16 20 31 OC [55] __ 'D __ 6_' __ ____ l __ __ L-1 B, 1 o 8 16 20 32 36 47
The OR of the first and second operands
is placed at the first-operand location.
The connective OR is applied to the
operands bit by bit. A bit position in
the result is set to one if the corre­
sponding bit position in one or both
operands contains a one; otherwise, the
result bit is set to zero.
For OR (OC), each operand is processed
left to right. When the operands over­ lap, the result is obtained as if the
operands were processed one byte at a
time and each result byte were stored
immediately after fetching the necessary
operand bytes.
For OR (01), the first operand is only
one byte in length, and only one byte is
stored. Resulting Condition Code: o Result zero 1 Result not zero 2
3
Program Exceptions:
Access (fetch, operand 2, 0 and OC; fetch and store, operand 1, 01 and DC) Programming Notes
1.
2.
3.
Examples of the use of
instruction are given in
A.
the OR Appendix OR may be used to set a bit to one.
Accesses to the first operand of OR (01) and OR (OC) consist in fetch­
ing a first-operand byte from stor­
age and subsequently storing the
updated value. These fetch and
store accesses to a particular byte
do not necessarily occur one imme­
diately after the other. Thus, OR cannot be safely used to update a
location in storage if the possi- 7-30 System/370 Principles of Operation PACK PACK bility exists that another CPU or a
channel may also be updating the
location. An example of this
effect is shown in the section "Mul t i programmi ng and f'lul ti process­
ing Examples" in Appendix A.
D t (l t ,B t ), D2 (L 2' B 2 ) [55] ,,-'_F2_' _____ I _L _1 ........ 1 _L _2 ___ I _8 _I "",,--I , 1 B, o 8 12 16 20 32 36 47
The format of the second operand is
changed from zoned to packed, and the
result is placed at the first-operand
location. The zoned and packed formats
are described in Chapter 8, "Decimal Instructions."
The second operand is treated as though
it had the zoned format. The numeric
bits of each byte are treated as a
digit. The zone bits are ignored,
except the zone bits in the rightmost
byte, which are treated as a sign.
The sign and digits are moved unchanged
to the first operand and are not checked
for valid codes. The sign is placed in the rightmost four bit positions of the
rightmost byte of the result field, and
the digits are placed adjacent to the sign and to each other in the remainder
of the result field.
The result is obtained as if the oper­
ands were processed right to left. When
necessary, the second operand is consid­
ered to be extended on the left with zeros. If the first operand is too
short to contain all digits of the
second operand, the remaining leftmost
portion of the second operand is
ignored. Access exceptions for the
unused portion of the second operand may
or may not be indicated.
When the operands overlap, the result is
obtained as if each result byte were
stored immediately after fetching the
necessary operand bytes. Two second­
operand bytes are needed for each result
byte, except for the rightmost byte of
the result field, which requires only
the rightmost second-operand byte. Condition Code: unchanged.
Program Exceptions:
The code remains
Access (fetch, operand 2; store,
operand 1)