interruption for fixed-point overflow
occurs.
Resulting Condition Code: o
1
2
3
Result zero; no overflow
Result less than zero; no over­
flow
Result greater than zero; no
overflow Overflow Program Exceptions:
Access (fetch, operand 2 of S only) Fixed-point overflow
Programming Notes
1. When, in the RR format, R1 and R2
designate the same register,
subtracting is equivalent to clear­
ing the register.
2. Subtracting a maximum negative
number from another maximum nega­
tive number gives a zero result and
no overflow. SUBTRACT HALFWORO SH [RX]
'4B' O
2 o 8 12 16 20 31
The second operand is subtracted from
the first operand, and the difference is
placed at the first-operand location.
The second operand is two bytes in
length and is treated as a 16-bit signed
binary integer. The first operand and
the difference are treated as 32-bit
signed binary integers.
When there is an overflow, the result is obtained by allowing any carry into the
sign-bit position and ignoring any carry
out of the sign-bit position, and condi­
tion code 3 is set. If the fixed­
point-overflow mask is one, a program
interruption for fixed-point overflow
occurs.
Resulting Condition Code: 0 Result zero; no overflow
1 Result less than zero; no over-
flow
2 Result greater than zero; no
overflow
3 Overflow Program Exceptions:
Access (fetch, operand 2)
Fixed-point overflow SUBTRACT LOGICAL SLR [RR] , 1 F' I R1 I R2 I 0 8 12 15
SL R 1 ,02(X
2
,B
2
) [RX]
'5 F' I R1 I X 2 I B2 O 2 o 8 12 16 20 31
The second operand is subtracted from
the first operand, and the difference is
placed at the first-operand location.
The operands and the difference are
treated as 32-bit unsigned binary inte­
gers.
Resulting Condition Code: o
1
2
3
Result not zero; no carry
Result zero; carry
Result not zero; carry
Program Exceptions:
Access (fetch, operand 2 of SL
only)
Programming Notes
1. Logical subtraction is performed by
adding the one's complement of the
second operand and a value of one
to the first operand. The use of
the one's complement and the value
of one instead of the two's comple­
ment of the second operand results in a carry when the second operand
is zero.
2. SUBTRACT LOGICAL differs from SUBTRACT only in the meaning of the
condition code and in the absence
of the interruption for overflow.
3.
4.
A zero difference
panied by a carry
tion O. is always accom­
out of bit posi-
The condition-code setting for SUBTRACT LOGICAL can also be inter-
preted as indicating the presence
and absence of a borrow,
follows:
1
2
3
Result not zero; borrow
Result zero; no borrow
Result not zero; no borrow
as Chapter 7. General Instructions 7-37

SUPERVISOR CALL SVC I [RR] 'OA' I
o 8 15
The instruction causes a supervisor-call
interruption, with the I field of the
instruction providing the rightmost byte
of the interruption code.
Bits 8-15 of the instruction, with eight
zeros appended on the left, are placed
in the supervisor-call interruption code
that is stored in the course of the
interruption. See "Supervisor-Call In­
terruption" in Chapter 6,
"Interruptions."
A serialization and checkpoint-
synchronization function is performed. Condition Code: The code
unchanged ana--Ts saved as part
old PSW. A new condition code is
as part of the supervisor-call
ruption.
Program Exceptions: None. TEST AND SET
TS D
2
(B
2
) [S]
'93' 1////////1 B2 D2 0 8 16 20 remains
of the
loaded
inter-
31
The leftmost bit (bit position 0) of the
byte located at the second-operand
address is used to set the condition
code, and then the byte is set to all
ones.
Bits 8-15 of
ignored.
the instruction are
The byte in storage is set to all ones
as it is fetched for the testing of bit
position O. This update appears to be
an interlocked-update reference as
observed by other CPUs. A serialization function is performed
before the byte is fetched and again
after the storing of all ones.
Resulting Condition Code: o
1
2
3
Leftmost bit zero
Leftmost bit one
7-38 System/370 Principles of Operation Program Exceptions:
Access (fetch and store, operand 2)
Programming Notes
1. TEST AND SET may be used for
controlled sharing of a common
storage area by programs operating
on different CPUs. This instruc­
tion is provided primarily for
compatibility with programs written
for System/360. The instructions COMPARE AND SWAP and COMPARE DOUBLE AND SWAP provide functions which
are more suitable for sharing among
programs on a single CPU or for
programs that may be interrupted. See the description of these
instructions and the associated
programming notes for details.
2. TEST AND SET does not interlock
against storage accesses by chan­
nels. Therefore, the instruction
should not be used to update a
location into which a channel
program may store, since the
channel-program data may be lost.
TEST UNDER MASK
TM D1(B1),1
2
[SI]
' 91 ' 12 B 1 D1 0 8 16 20 31
A mask is used to select bits of the
first operand, and the result is indi­
cated in the condition code.
The byte of immediate data, 1
2
, is used
as an eight-bit mask. The bits of the
mask are made to correspond one for one
with the bits of the byte in storage
designated by the first-operand address.
A mask bit of one indicates that the
storage bit is to be tested. When the
mask bit is zero, the storage bit is
ignored. When all storage bits thus
selected are zero, condition code 0 is set. Condition code 0 is also set when
the mask is all zeros. When the
selected bits are all ones, condition
code 3 is set; otherwise, condition code
1 is set.
Access exceptions associated with the
storage operand are recognized for one
byte even when the mask is all zeros.
Resulting Condition Code: o Selected bits all zeros; or
mask bits all zeros