1.-6. Exceptions with the same pri­
ority as the priority of pro­
gram-interruption conditions
for the general case.
7.A Access exceptions for second
instruction halfword.
7.B.1 Operation exception if the
dual-address-space facility
is not installed.
7.B.2 Special-operation exception
due to OAT being off.
8. Privileged-operation exception
due to extraction-authority
control, bit 4 of control reg­
ister 0, being zero. Priority of Execution: EXTRACT PRIMARY ASN EXTRACT SECONDARY ASN ESAR [RRE]
'B227' a 16 24 28 31
The 16-bit SASN, bits 16-31 of control
register 3, is placed in bit positions
16-31 of general register R t • Bits 0-15 of the general register are set to
zeros.
Bits 16-23 and 28-31 of the instruction
are ignored. Special Conditions The instruction must be executed with
DAT on; otherwise, a special-operation
exception is recognized. The special­
operation exception is recognized 1n
both the problem and supervisor states.
In the problem state, the extraction­
authority control, bit 4 of control
register 0, must be one; otherwise, a
privileged-operation exception is recog­
nized. In the supervisor state, the
extraction-authority-control bit is not
examined.
The priority of recognition of program
exceptions for the instruction is shown
in the figure "Priority of Execution: EXTRACT SECONDARY ASN." Condition Code: unchanged.
The code remains Program Exceptions:
Operation (if the dual-address-
space facility is not
installed) Privileged operation (extraction­
authority control is zero in
the problem state)
Special operation
1.-6. Exceptions with the same pri­
ority as the priority of pro­
gram-interruption conditions
for the general case.
7.A Access exceptions for second
instruction halfword.
7.B.1 Operation exception if the
dual-address-space facility
is not installed.
7.B.2 Special-operation exception
due to DAT being off.
8. Privileged-operation exception
due to extraction-authority
control, bit 4 of control
register 0, being zero. Priority of Execution: EXTRACT SECONDARY ASN INSERT ADDRESS SPACE CONTROL lAC R t [RRE]
'B224' 1////////1 R t 1////1 0 16 24 28 31
The address-space-control bit, bit 16 of
the current PSW, is placed in bit posi­
tion 23 of general register R t • Bits
16-22 of the register are set to zeros,
and bits 0-15 and 24-31 of the register
remain unchanged. The address-space­
control bit is also used to set the
condition code.
Bits 16-23 and 28-31 of the instruction
are ignored. Special Conditions The instruction must be executed with
OAT on; otherwise, a special-operation
exception is recognized. The special­
operation exception is recognized in
both the problem and supervisor states. Chapter 10. Control Instructions 10-7

In the problem state, the extraction­
author; ty control,· bi t 4 of control
register 0, must be one; otherwise, a
privileged-operation exception is recog­
nized. In the supervisor state, the
extraction-authority-control bit is not
examined.
The priority of recognition of program
exceptions for the instruction is shown
in the figure "Priority of Execution:
INSERT ADDRESS SPACE CONTROL." Resulting Condition Code: o
1
2
3 PSW bit 16 zero PSW bit 16 one Program Exceptions:
Operation (if the dual-address-
space facility is not
installed) Privileged operation (extraction­
authority control is zero in
the problem state)
Special operation
1.-6. Exceptions with the same pri­
ority as the priority of pro­
gram-interruption conditions
for the general case.
7.A Access exceptions for second
instruction halfword.
7.B.l Operation exception if the
dual-address-space facility
is not installed.
7.B.2 Special-operation exception
due to OAT being off.
8. Privileged-operation exception
due to extraction-authority
control, bit 4 of control
register 0, being zero. Priority of Execution: INSERT ADDRESS SPACE CONTROL Programming Notes
1. Bits 16-22 of general register Rt
are reserved for expansion for use
with possible future facilities. The program should not depend on
these bits being set to zeros. condition codes 2 and 3
may be set as a result of future
facilities.
2. INSERT ADDRESS SPACE CONTROL and
SET ADDRESS SPACE CONTROL are 10-8 System/370 Principles of Operation defined to operate on the third
byte of a general register so that
the address-space-control bit can
be saved in the same general regis­
ter as the PSW key, which is placed
in the fourth byte of general
register 2 by INSERT PSW KEY. INSERT PSW KEY IPK [S] 'B20B' 1////////////////1
o 16 31
The four-bit PSW-key, bits 8-11 of the
current PSW, is inserted in bit posi­
tions 24-27 of general register 2, and
bits 28-31 of that register are set to
zeros. Bits 0-23 of general register 2
remain unchanged.
Bits 16-31
ignored.
of the instruction are
Special Conditions In the problem state, when DAS is
installed, the extraction-authority
control, bit 4 of control register 0, must be one; otherwise, a privileged­
operation exception is recognized. When
DAS is not installed, execution of the
instruction in the problem state results
in a privileged-operation exception
regardless of the extraction-authority
control. In the supervisor state, the
extraction-authority-control bit is not
examined. Condition Code: unchanged.
The code remains Program Exceptions:
Operation (if the PSW-key-handling facility is not installed) Privileged operation (executed in
the problem state, and either
the dual-address-space facility
is not installed or the
extraction-authority control is
zero)
INSERT STORAGE KEY 15K [RR]
o 8 12 15