The operation is suppressed on all
addressing and protection exceptions. Condition Code: unchanged.
The code remains
Program Exceptions:
Access (fetch, operand 2)
Addressing (new prefix area)
Operation (if the multiprocessing
facility is not installed)
Privileged operation
Specification
SET PSW KEY FROM ADDRESS
SPKA [S] 'B20A' o 16 20 31
The four-bit PSW key, bits 8-11 of the
current PSW, is replaced by bits 24-27
of the second-operand address.
The second-operand address is not used
to address data; instead, bits of
the address form the new PSW key. Bits
8-23 and 28-31 of the second-operand
address are ignored.
Special Conditions
In the problem state, when DAS is
installed, the execution of the instruc­
tion is subject to control by the PSW­
key mask in control register 3. When
the bit in the PSW-key mask correspond­
ing to the PSW-key value to be set is
one, the instruction is executed
successfully. When the selected bit in the PSW-key mask is zero, a privileged­
operation exception ;s recognized. When
DAS is not installed, execution of the
instruction in the problem state results
in a privileged-operation exception
regardless of the contents of control
register 3. In the supervisor state,
any value for the PSW key is valid. Condition Code: The
unchanged.
Program Exceptions:
code remains
Operation (if the PSW-key-handling
facility is not installed)
Privileged operation (executed in
the problem state, and either
DAS is not installed or
selected PSW-key-mask bit is
zero)
Programming 1. The format of SET PSW KEY FROM ADDRESS permits the program to set
the PSW key either from the general
register designated by the B2 field
or from the D2 field in the
instruction itself.
2. When one program requests another
program to access a location desig­
nated by the requesting program, SET PSW KEY FROM ADDRESS can be
used by the called program to veri­
fy that the requesting program is
authorized to make this access,
provided the storage location of
the called program is not protected
against fetching. The called
program can perform the verifica­
tion by replacing the PSW key with
the requesting-program PSW key
before making the access and subse­
quently restoring the called­
program PSW key to its original
value. Caution must be exercised,
however, in handling any resulting
protection exceptions since such
exceptions may cause the operation
to be terminated. See TEST PROTECTION and the associated
programming notes for an alterna­
tive approach to the testing of
addresses passed by a calling
program.
SET SECONDARY ASN SSAR Rt [RRE]
'B225'
o 16 24 28 31
The ASH specified in bit positions 16-31
of general register Rt replaces the
secondary ASN in control register 3, and
the segment-table designation corre­
sponding to that ASN replaces the SSTD
in control register 7.
Bits 16-23 and 28-31 of the instruction
are ignored.
The contents of bit positions 16-31 of
general register Rt are called the new ASN. The contents of bit positions 0-15 of the register are ignored.
First the new ASN is compared with the
current PASN. If the new ASN is equal
to the PASN, the operation is called SET SECONDARY ASN to current primary
(SSAR-cp). If the new ASN is not equal
to the current PASN, the operation is
called SET SECONDARY ASN with space
switching (SSAR-ss). The SSAR-cp and
SSAR-ss operations are depicted in the
figure "Execution of SET SECONDARY ASN." Chapter 10. Control Instructions 10-41

SET SECONDARY to Current Primary (SSAR-cp) The new ASN replaces the SASN, bits
16-31 of control register 3; the PSTD, bits 0-31 of control register 1,
replaces the SSTD, bits 0-31 of control
register 7; and the operation is
completed. SET SECONDARY ASN with Space Switching (SSAR-ss) The new ASN is translated by means of
the ASH translation tables, and then the
current AX, bits 0-15 of control regis­ ter 4, is used to test whether the
program is authorized to access the
specified ASH. The new ASN is translated by means of a
two-level table lookup. Bits 0-9 of the
new ASH (bits 16-25 of the register) are a 10-bit AFX which is used to select an
entry from the ASH first table. Bits 10-15 of the new ASH (bits 26-31 of the
register) are a six-bit ASX which is
used to select an entry from the ASH second table. The two-level lookup is
described in the section "ASH Trans­
lation" in Chapter 3, "Storage." The
exceptions associated with ASH trans­
lation are collectively called "ASN­ translation exceptions." These
exceptions and their priority are
described in Chapter 6, "Interruptions."
The AST entry obtained as a result of
the second lookup contains the segment­
table designation and the authority­
table origin and length associated with
the ASH. All bit positions in the AST entry requiring zeros are inspected for
zeros. This includes bits 97-103, even
though the linkage-table-designation
portion of the entry is not used.
The authority-table origin from the ASH second-table entry is used as a base for
a third table lookup. The current
authorization index, bits 0-15 of 10-42 System/370 Principles of Operation control register 4, is used, after it
has been checked against the authority­
table length, as the index to locate the
entry in the authority table. The
authority-table lookup is described in
the section "ASN Authorization" in Chap­ ter 3, "Storage." The new ASH, bits 16-31 of general
register Rt, is placed in the SASH, bit
positions 16-31 of control register 3.
The segment-table designation, bits
64-95 of the AST entry, is placed in the SSTD, bits 0-31 of control register 7.
For both the SSAR-cp and SSAR-ss oper­
ations, a serialization and checkpoint­
synchronization function is performed
before the operation begins and again
after the operation is completed. Special Conditions The operation is performed only when the ASH-translation control, bit 12 of
control register 14, is one and OAT is
on. When either the ASH-translation­ control bit is zero or OAT is off, a
special-operation exception is recog­
nized. The special-operation exception
is recognized in both the problem and
supervisor states.
The priority of recognition of program
exceptions for the instruction is shown
in the figure "Priority of Execution: SET SECOHDARY ASH." Condition Code: unchanged. Program Exceptions:
The code remains
Addressing (authority-table entry, SSAR-ss only) ASH translation (SSAR-ss only) Operation (if the dual-address-
space facility is not
installed) Secondary authority (SSAR-ss only) Special operation
Trace