The current value of the
word designated by the second-operand
stopped state.
The doubleword operand replaces the
contents of the
the resolution of the clock.
bits of the operand are set
that correspond to the bit positions
which are updated by the clock; the
contents of the remaining rightmost bit
positions of the operand are ignored and
are not preserved in the clock. In some
models, starting at or to the right of
bit position 52, the rightmost bits of
the second operand are
corresponding positions of the clock
which are implemented are set to zeros.
After the clock value is set, the clock
enters the stopped state. The clock
leaves the stopped state to enter the
set state and resume incrementing under
control of the TOD-clock-sync control
(bit 2 of control register
bit is zero or the
installed, the clock enters the set
state at the completion of the instruc
tion. When the bit is one, the clock
remains in the stopped state either
until the bit is set to zero or until
any other running
configuration is incremented to
of all zeros in bit positions 32-63.
When the
state under control of the TOD-clock
sync control bit of the
the clock. If, while the clock is
stopped, it is set by another
the clock comes under control of the
TOD-clock-sync control bit of the
The value of the clock is changed and
the clock is placed in the stopped state
only if the manual
any
the enable-set position. If the
position, the value and the state of the
clock are not changed. The two results
are distinguished by condition codes
When the clock is not operational, the
value and state of the clock are not
changed, regardless of the setting of
the
code 3 is set.
doubleword boundary;
ification exception
Resulting Condjtion
1
2
3
Access
In an installation with more than one
multiple
procedures are required to synchronize
the clocks.
The current value of the clock compara
tor is replaced by the contents of the
doubleword designated by the second
operand address.
in the clock comparator that correspond
to the bit positions to be compare.d with
the
remaining rightmost bit positions of the
operand are ignored and are not
preserved in the clock comparator.
doubleword boundary; otherwise, a spec
ification exception is recognized.
The operation is suppressed on all
addressing and protection exceptions.
Chapter