3 Not operational
Thecondition code set when CLEAR CHAN NEL causes the CLRCH function to be
performedis shown for all possible
states of theI/O system in the figure "Condition Codes Set by CLEAR CHANNEL." The condition code set when CLEAR CHAN NEL causes the TCH function to be
performed is shown for all possible
states of theI/O system in the figure "Condition Codes Set by TEST CHANNEL" in
the definition of the instruction TESTCHANNEL. See the section "States of the Input/Output System" in this chapter for a detailed definition of the A, I, W, and N states.
NChannel A I W H +
3++
Available
Interruption Pending
WorkingNot Operational On certain channels, when the work
ing state precludes performing theI/O-system reset on the I/O inter
face, condition code 2 is set.
++On certain channels, when the not
operational state is due to a
channel-check-stop condition, the
instruction is executed, and condi
tion code0 is set. Condition Codes Set by CLEAR CHANNEL Programming Note CLEAR CHANNEL should be used to reset an I/O-device association with an I/O interface when I/O devices are shared
with other systems or have multiple
paths to the same system. In those
cases whenI/O devices are shared,
before usingCLEAR CHANNEL, steps should
be taken to protect against compromising
data integrity until the desired1/0- device association can be reestablished. CLEAR CHANNEL may cause a channel that
is not operational because of a
channel-check-stop condition to be
restored. Before a not-operational
channel can be restored or system reset
signaled on anI/O interface, on some
modelsCLEAR CHANNEL must be issued to
all channels.On other models, CLEAR CHANNEL, when issued to a subset of the
channels, can cause a not-operational
channel to be restored and system reset
to be signaled on anI/O interface.
Refer to the SL publication for the
model to determine the appropriate
recovery action.CLEAR I/O [S] '9D01' o 16 20 31
TheCLRIO function causes the current
operationwith the addressed device to
be discontinued and the state of the
operation at thetime of the discontin
uation to be indicated in the storedCSW. Bits 8-14 of the instruction are
ignored. Bit positions 16-31 of the
second-operand address identify the
channel, subchannel, andI/O device to
which the instruction applies.
Either aTIO or CLRIO function is
performed, depending on the channel and
the block-multiplexing-control bit, bit
o of control registerO. The TID func
tion is performed when theCLRIO func
tionis not implemented by the channel
or when the block-multiplexing-control
bi tis zero.
TheTIO function is described in the
definition of the TESTI/O instruction.
When the subchannel is available,
interruption-pending with another
device, or working with another device,
no channel action is taken, and condi
tion code0 is set. Channels not capa
ble of determining subchannel states
while in the working state may set
condition code 2.
When the subchannel is either working
with the addressed device or
interruption-pending with the addressed
device, theCLRIO function causes condi
tion code 1 to be set and causes the
channel to discontinue the operation
with the addressed device by storing the
status of the operation in theCSW and
making the subchannel available. When
the channel is working with the
addressed device, the device is signaled
to terminate the current operation.
Some channels may, instead, indicate
busy and cause no channel action.
When any of the following conditions
occurs, theCLRIO function causes the CSW to be stored at real storage
locations 64-71. The contents of the
entireCSW pertain to the I/O device
addressed by the instruction.
1. The channel is available or
interruption-pending, and the
subchannel (1) contains an inter
ruption condition for the addressed
device because of the ending of anI/O operation at the subchannel or
(2) is working with the addressed
device. The subchannel-key,Chapter 13. Input/Output Operations 13-17
The
performed
states of the
performed is shown for all possible
states of the
the definition of the instruction TEST
N
3++
Available
Interruption Pending
Working
ing state precludes performing the
face, condition code 2 is set.
++
operational state is due to a
channel-check-stop condition, the
instruction is executed, and condi
tion code
with other systems or have multiple
paths to the same system. In those
cases when
before using
be taken to protect against compromising
data integrity until the desired
is not operational because of a
channel-check-stop condition to be
restored. Before a not-operational
channel can be restored or system reset
signaled on an
models
all channels.
channels, can cause a not-operational
channel to be restored and system reset
to be signaled on an
Refer to the SL publication for the
model to determine the appropriate
recovery action.
The
operation
be discontinued and the state of the
operation at the
uation to be indicated in the stored
ignored. Bit positions 16-31 of the
second-operand address identify the
channel, subchannel, and
which the instruction applies.
Either a
performed, depending on the channel and
the block-multiplexing-control bit, bit
o of control register
tion is performed when the
tion
or when the block-multiplexing-control
bi tis zero.
The
definition of the TEST
When the subchannel is available,
interruption-pending with another
device, or working with another device,
no channel action is taken, and condi
tion code
ble of determining subchannel states
while in the working state may set
condition code 2.
When the subchannel is either working
with the addressed device or
interruption-pending with the addressed
device, the
tion code 1 to be set and causes the
channel to discontinue the operation
with the addressed device by storing the
status of the operation in the
making the subchannel available. When
the channel is working with the
addressed device, the device is signaled
to terminate the current operation.
Some channels may, instead, indicate
busy and cause no channel action.
When any of the following conditions
occurs, the
locations 64-71. The contents of the
entire
addressed by the instruction.
1. The channel is available or
interruption-pending, and the
subchannel (1) contains an inter
ruption condition for the addressed
device because of the ending of an
(2) is working with the addressed
device. The subchannel-key,