subchannel appears to the program as if
no busy indication had been encountered.
Includes the ability to store a nonzero
value in the measurement byte at
location 185. STORAGE-KEY-INSTRUCTION EXTENSIONS Provides the instructions INSERT STORAGE KEY EXTENDED, RESET REFERENCE BIT
EXTENDED, and SET STORAGE KEY EXTENDED.
These instructions provide 31-bit
addresses and operate on the storage
keys associated with a 4K-byte block of
storage. STORAGE-KEY 4K-BYTE BLOCK Provides for a single key associated
with each 4K-byte block of storage, and
the storage-key-exception control, bit 7
of control register O. When this facil­
ity is not installed, a separate storage
key is associated with each 2K-byte
block of storage.
SUSPEND AND RESUME Provides a suspend bit in the CCW which
may indicate that the channel program is
to be suspended, as well as a bit in the CAW that controls whether the suspend
bit should be examined and a new bit in
the channel-status word which indicates
that a channel program has been
suspended. The instruction RESUME I/O causes a suspended channel program to be
resumed.
TEST BLOCK Includes the TEST BLOCK instruction for
testing the usability of a 4K-byte block
of main storage. TRANSLATION Includes the following facilities: Dynamic Address Translation (DAT).
The DAT facility includes ---the
translation mechanism, with the
associated control-register posi­
tions and program-interruption
codes, and reference and change
recording. The DAT facility also
includes controls for 4K-byte page size and 64K-byte segment size.
Depending on the model, controls
for 2K-byte page size or 1M-byte
segment size, or both, may also be
provided.
Program-Event Recording (PER). The PER faci!ity includes the associ­
ated control-register positions and
extensions to the program­
interruption code. Extended-Contro! (EC) Mode. SSM Suppression. This facility in­
c!udes the control-register posi­
tion for the SSM-suppression­
control bit and the program­
interruption code for special
operation.
Store Status and Noninitia!izing Reset.
As part of these facilities, the follow­
ing instructions are provided: LOAD REAL ADDRESS, PURGE TLB, RESET REFERENCE BIT, STORE THEN AND SYSTEM MASK, and STORE THEN OR SYSTEM MASK. VECTOR The instructions and functions of the
vector faci!ityand its registers are
described in the publication IBM System/370 Vector Operations, SA22-7125.
31-B1T IDAWS
Extends the size of the address field in
the indirect-data-address word to 31
bits.
Appendix D. Facilities D-5
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