TOO clock for 4-23
multiprogramming examples A-40 MVC (MOVE) instruction 7-23
examples A-18,A-21 MVCIN (MOVE INVERSE) instruction 7-24
example A-22 MVCK (MOVE WITH KEY) instruction 10-24 MVCL (MOVE LONG) instruction 7-24
examples A-22 MVCP (MOVE TO PRIMARY) instruction 10-22 MVCS (MOVE TO SECONDARY) instruction 10-22 MVI (MOVE) instruction 7-23
example A-21 MVN (MOVE NUMERICS) instruction 7-27
example A-23 MVO (MOVE WITH OFFSET) instruction 7-27
example A-23 MVZ (MOVE ZONES) instruction 7-28
example A-24
MXD (MULTIPLY) floating-point instruc­
tion 9-13
MXDR (MULTIPLY) floating-point instruc­ tion 9-13
MXR (MULTIPLY) floating-point instruc­
tion 9-13 N N (AND) instruction 7-8 NC (AND) instruction 7-8
near-valid CBC 11-2
in storage 11-5
negative zero
binary 7-2
decimal 8-3
example A-5
new PSW 4-3
assigned storage locations for 3-41
fetched during interruption 6-2 NI (AND) instruction 7-8
example A-8
no-operation
as an I/O command (control) 13-50 instruction (BRANCH ON CONDITION) 7-10 noninterlocked-update storage reference
5-29
nonshared subchannel 13-5
nonvolatile storage 3-2
normalization 9-2
not-available state (I/O system) 13-9
not operational
as CPU state 4-40 effect on channel set 4-43
as I/O-system state 13-11
as TOO-clock state 4-25
not ready
(signal-processor status) 4-42
as I/O-device state 13-10 not set (TOO-clock state) 4-24 NR (AND) instruction 7-8
nullification
exceptions to 5-11
for exigent machine-check conditions
11-11
of instruction execution 5-9
of unit of operation 5-10 numbering
of addresses (byte locations) 3-2
of bits 3-3
numbers
binary 7-2
examples A-2 CPU-model 10-48 decimal 8-1
examples A-5
floating-point 9-1
examples A-5
hexadecimal F-l,5-4
numeric bits 8-1
moving of 7-27
o
o (OR) instruction 7-29 OC (OR) instruction 7-29 OEM! (original equipment manufacturers'
information) for I/O interface, publi­
cation referenced v 01 (OR) instruction 7-29
example A-25
example of problem with A-40 old PSW 6-2
assigned storage locations for 3-41 one's complement binary notation 7-2
used for SUBTRACT LOGICAL instruction
7-37
op code (See operation code)
operand 5-2
access of 5-28
address generation for 5-5
immediate 5-4
length of 5-2
overlap
for decimal instructions 8-3
for general instructions 7-2
register for 5-4
sequence of references for 5-28
storage 5-4
types of (fetch, store, update) 5-28
used for result 5-2
operating state 4-2,4-2
operation
code (op code) 5-2
invalid 6-21
exception 6-21 I/O (See I/O operations)
unit of 5-9
operational state (I/O system) 13-9
operator facilities 2-6,12-1
basic 12-1
operator intervening (signal-processor
status) 4-41 OR (O,OC,OI,OR) instructions 7-29
example of problem with OR immediate A-40 examples A-25
orders (signal-processor) 4-38
conditions precluding response to 4-40 CPU reset 4-39
emergency signal 4-39
external call 4-39
initial CPU reset 4-39
initial microprogram load 4-39
initial program reset 4-39
program reset 4-39
restart 4-39
sense 4-38
start 4-39
stop 4-39
stop and store status 4-39
overflow
binary 7-3
Index X-1S

example A-2
decimal 6-19
exponent (See exponent overflow)
fixed-point 6-20,7-3 overlap
destructive 7-25
operand
for decimal instructions 8-3
for general instructions 7-2
operation 5-24
overrun (bit in I/O-sense data) 13-51 P PACK (PACK) instruction 7-30 example A-25
packed decimal numbers 8-1
conversion of to zoned format 7-40 conversion to from zoned format 7-30 examples A-5
padding byte
for COMPARE LOGICAL LOHG instruction
7-15
for MOVE LONG instruction 7-24
page 3-21
page-frame real address (PFRA) 3-26
page index (PX) 3-21
page-invalid bit (in page-table entry)
3-26
page size 3-23
2K-byte optional D-5
page swapping 3-20 page table 3-26
designation 3-25
length (PTL) 3-25
lookup 3-31
origin (PTO) 3-25
page-translation exception 6-22
as an access exception 6-28,6-33
parameter
external-interruption 6-10 assigned storage locations for
3-42
translation 3-22
parity bit 11-2
partial completion of instruction
execution 5-9 PASH (primary address-space number)
3-13
as part of DAS 5-14
pattern (in EDIT) 8-6 PC (PROGRAM CAll) instruction 10-25 PC-cp (PROGRAM CAll instruction, to
current primary) 10-26 PC number 5-16,10-25 translation 5-21 PC-ss (PROGRAM CAll instruction, with
space switching) 10-26 PC-translation-specification exception
6-22 PCI (program-controlled interruption)
13-44
channel status for 13-70 flag in CCW for 13-38
pending I/O operations 13-27
number of (in I/O-communication area)
13-83
pending interruption (See interruption
pending) PER (program-event recording) 4-15
address 4-17
assigned storage locations for
3-43
X-16 System/370 Principles of Operation code 4-17
assigned storage locations for
3-43
events 4-15
general-register-alteration event 4-20 mask bits 4-16
instruction-fetching event 4-19
masks
bit in PSW 4-6
general-register 4-16 PER-event 4-16
priority of indication 4-17
program-interruption condition 6-22
storage-alteration event 4-19
storage-area designation 4-18
ending address 4-16
starting address 4-16
wraparound 4-18
successful-branching event 4-19 PFRA (page-frame real address) 3-26
piecemeal steps of instruction execution
5-25 PKM (PSW-key mask) 5-18
point of damage 11-14
point of interruption 5-9
for machine check 11-14 POST (SVC), example of routine to bypass
A-42
postnormalization 9-2
power controls 12-3
power-on reset 4-35
powers of 2, table of E-1
precision (floating-point) 9-1
preferred sign codes 8-2
prefetching
access exceptions not recognized for 6-30 for I/O 13-40 handling of invalid CBC in storage
keys during 11-8
of CCWs (channel-command word) 13-42
of OAT-table entries 5-27
of instructions 5-27
prefix 3-11
store-status save area for 3-45
prenormalization 9-2
primary address space 3-12
as part of DAS 5-14
primary ASH (PASH) 3-13
as part of DAS 5-14
primary authority 3-18
exception 6-23
primary segment table
designation (PSTD) 3-24
length (PSTl) 3-24
origin (PSTO) 3-24
primary-space mode 3-22
as part of DAS 5-14
primary virtual address 3-5
effective segment-table designation
for 3-27
priority
of access exceptions 6-33
of ASH-translation exceptions 6-35
of external-interruption conditions 6-10 of interruptions (CPU) 6-36
of interruptions (I/O) 13-62
of PER events 4-17
of program-interruption conditions 6-30,6-30 of trace exceptions 6-35
privileged instructions 4-6