Permanently Assigned Real Addresses Addresses of PSWs, interruption codes, and associated in­ formation used during interruption Address used by CPU to update interval timer in the word at
real location 80 Addresses of CAW, CSW, and other locations used during an I/O interruption or during execution of an I/O instruction,
including STORE CHANNEL ID Absolute Addresses Prefix value CCW address in CAW Data address in CCW IDAW address in a CCW specifying indirect-data addressing CCW address in a CCW specifying transfer in channel Data address in IDAW JOEL address at real locations 173-175 Failing-storage address stored in the word at real location
248 CCW address in CSW Permanently Assigned Absolute Addresses Addresses of PSW and first two CCWs used for initial pro­
gram loading Addresses used for the store-status function Addresses Not Used to Reference Storage PER starting address in control register 10 PER ending address in control register 11 Address stored in the word at real location 156 for a monitor event
Address in shift instructions and other instructions speci­
fied not to use the address to reference storage
Handling of Addresses (Part 2 of 2)
ASSIGNED STORAGE LOCATIONS The figure "Assigned Storage Locations"
shows the format and extent of the
assigned locations in storage. The
locations are used as follows. Unless
specifically noted, the usage applies to
both the BC and EC modes. 0-7 (Absolute Address) Initial-Program-loading PSW: The first eight bytes read during the initial-program­
loading (1PL) initial-read oper­
ation are stored at locations 0-7. The contents of these locations are used as the new PSW at the completion of the 1PL operation. These locations may also be used for temporary stor­
age at the initiation of the IPL operation, and bytes 2 and 3
hold the I/O address at the
conclusion of an 1PL in the BC mode. 0-7 8-15
8-15
16-23
(Real Address)
Restart New PSW: The new PSW is fetched locations 0-7 during a restart interruption.
(Absolute Address)
Initial-Program-loading CCWl: Bytes 8-15 read during initial-program-loading (IPL) initial-read operation are
stored at locations 8-15. The
contents of these locations are ordinarily used as the next CCW in an IPL CCW chain after
completion of the IPL initial­
read operation.
(Real Address) Restart Old PSW: The current PSW is stored-a5 the old PSW at
locations 8-15 during a restart interruption.
(Absolute Address) Initial-Program-loading CCW2: Bytes 16-23 read during the initial-program loading (IPl) Chapter 3. Storage 3-41
24-31
32-39 40-47 48-55
56-63
64-71
72-75 80-83 initial-read operation
stored at locations 16-23.
contents of these locations
be used as another CCW in IPL CCW chain to follow CCW1. (Real Address)
are
The
may
the IPl External Old PSW: The current PSW is stored as the old PSW at
locations 24-31 during an external interruption.
(Real Address)
Supervisor-Call Old PSW: The
current PSW is stored as the old PSW at locations 32-39 during a supervisor-call interruption.
(Real Address) Program PSW: The current PSW is stored as the old PSW at locations 40-47 during a program
interruption.
(Real Address) Machine-Gbeck Old PSW: The current PSL.J is storedas the old PSW at locations 48-55 during a
machine-check interruption.
(Real Address) Input/OutEl!! Old PSW: The
current PSW is stored as the old PSW at locations 56-63 during an I/O interruption.
(Real Address) CSW: The channel-status word (CSW) is stored at locations
64-71 during an I/O interruption. Part or all of it may be stored during the execution of CLEAR I/O, HALT
DEVICE, HALT I/O, START I/O, START I/O FAST RELEASE, STORE CHANNEL ID, or TEST I/O, in
which case condition code 1 is set.
(Real Address) CAW: The channel-address word (CAW) is fetched from locations
72-75 during the execution of
START I/O and START I/O FAST RELEASE. (Real Address) Interval Timer: Locations 80-83 contain the interval timer. The
interval timer is updated when­
ever the CPU is in the operating
state and the manual interval­
timer control is set to enable.
3-42 System/370 Principles of Operation 84-87
88-95
(Logical Address)
Trace-Table-Designation Word:
The DAS-trace-control bit and
the trace-table-entry-header
origin are fetched from
locations 84-87.
(Real Address)
External New PSW: The new PSW is fetched from--Iocations 88-95
during an external interruption. 96-103 (Real Address) Supervisor-Call New PSW: The new PSW is fetched from
locations 96-103 during a
supervisor-call interruption. 104-111 (Real Address) Program New PSW: The new PSW is
fetched from locations 104-111 during a program interruption.
112-119 (Real Address) Machine-Check New PSW: The new PSW is fetchedfrom locations
112-119 during a machine-check
interruption. 120-127 (Real Address) Input/Output New PSW: The new PSW is fetched from locations 120-127 during an I/O inter­
ruption.
128-131 (Real Address)
External-Interruption Parameter: During an external interruption
due to service signal, the
parameter associated with the
interruption is stored at
locations 128-131.
132-133 (Real Address) CPU Address: During an external
interruption due to malfunction
alert, emergency signal, or
external call, the CPU address
associated with the source of
the interruption is stored at
locations 132-133. For all
other external-interruption
conditions, zeros are stored at
locations 132-133 when the old PSW specified the EC mode, and
the field remains unchanged when
the old PSW specified the BC mode.
134-135 (Real Address)
External-Interruption Code: During an external interruption
in the EC mode, the interruption
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