Protection for DAS Tracing
The references to the trace-table desig­ nation, to the trace-table-entry header,
and to a trace entry for the purpose of
DAS tracing are not subject to key­
controlled protection. Low-address
protection and segment protection do apply, however, to the store into the
current-entry-control word of the header and into a trace entry. Instruction
execution is suppressed whenever a
protection exception is recognized that
is due to DAS tracing.
other Actions Associated with DAS Trac­ .i.n.g The store accesses made by DAS tracing
into the current-entry-control word of
the trace-table-entry header and into
the trace entry are monitored for PER storage-alteration events. Change recording and reference recording also
apply to the storage accesses made by
DAS tracing. Serialization for DAS Tracing
A serialization and checkpoint­
synchronization function is performed
before the operation begins and again
after the operation is completed. TRACE-TABLE DESIGNATION The trace-table designation is contained
in the word at logical location 84 and
has the following format.
o 1
Trace-Table-Entry-Header Origin (logical)
8 29 31 DAS-Trace Control: Bit 0 controls
whether implicit tracing is performed
for PROGRAM CALL, PROGRAM TRANSFER, and SET SECONDARY ASN. When this bit ;s zero, no tracing is performed during execution of these instructions. When
the bit is one, a trace entry is made each time one of these instructions is executed.
Trace-Table-Entry-Header Origin: Bits 8-28, with three zeros appended on the right, constitute the logical address of the trace-table-entry header.
Bits 1-7 are reserved and should be
zeros. They are ignored during implicit
tracing.
Bits 29-31 must be zeros if the DAS­ trace-control bit is one and execution
of PROGRAM CALL, PROGRAM TRANSFER, or SET SECONDARY ASN is attempted; other­
wise, a specification exception is
recognized. TRACE-TABLE-ENTRY HEADER
The trace-table-entry header defines a table of 32-byte entries. One entry is
filled with information for each traced
instruction. After updating, the first
word of the header designates the entry
in which information is placed for the
current instruction. The second and
third words of the header designate the beginning and end of the table. The
trace-table-entry header has the follow­
ing format: Current-Entry First-Entry Control Control o 32
Last-Entry Control 64 95 Current-Entry Control: Bits 0-31 are updated to contain the origin of the
trace-table entry used for the current
instruction.
To update the field, a 32-bit intermedi­ ate quantity called the next-entry
designator is formed by the logical addition of 32 to the 32-bit contQnts of the current-entry control, with overflow
out of bit 0 ignored. The next-entry
designator is then logically compared
with the 32-bit contents of tho last­ entry control. If the next-entry
designator is less than the contents of
the last-entry control, then the 32-bit next-entry designator replaces the current-entry control. If the next­
entry designator is equal to or grp-ater than the contents of the last-entry control, then the 32-bit contents of the
first-entry control replace the contents
of the current-entry control. A spec­ ification exception is recognized if the
new value of bits 27-31 would not be
zero.
Bits 0-31 are replaced by using a word­
concurrent interlocked-update reference.
The field is not updated until it is determined that no exceptions would be
encountered before the filling of the
current trace entry is completed or
before the current instruction is completed. This is accomplished by first fetching the contents of the
current-entry control, computing the
address of the trace entry, and testing
the address for access exceptions. If Chapter 4. Control 4-13

no exceptions would be encountered, the
current-entry control is updated by
means of a compare-and-swap type of
access. If the contents of the location
have been changed between the time of the first fetch and the compare-and-swap
interlocked update, the new value of the
current-entry control is used, and the
procedure is repeated.
The new contents of bits 8-26 (called
the current-entry origin), with five zero bits appended on the right, consti­
tute the logical address of the trace
entry for the current instruction. For
the purpose of determining the address
of the current entry, the first word of
the header has the following format:
o 8
Current-Entry Origin (logical)
27 31
The second and third words of the header
are used as follows:
First-Entrv Bits 32-63 replace
the contents of bit positions 0-31 when
the last-entry control disallows tracing
in the location following the last-used
trace entry.
last-Entry Control: Bits 64-95 are compared with a derived 32-bit quantity cDlled the next-entry designator. Depending on whether the next-entry dosignator is (1) less than, or
(2) equal to or greater than bits 64-95, bits 0-31 rC!placed by using an j nterlocf<ed-updato refer'once ei ther by
(1) the next-entry designator or (2) the contents of bit positions 32-63.
Interlocks
The current-entry-control word is changed by using word-concurrent
interlocked-update reference. The fetches of the first-entry-control and last-entry-control words are word­
concurrent and are made without regard to when the interlock on the current­
entry-control word is established. During tracing, the fetches of the
first-entry-control word and of the
last-entry-control word that are
performed in conjunction with updating the current entry-control word are not necessarily interlocked to prevent
subsequent storing into these words by
other CPUs and by channels.
4-14 System/370 Principles of Operation Programming Notes
1. The last-entry-control word should
be thought of as designating the
location beyond the last entry in
the table. This is because an
equal comparison with the last­
entry-control value results in wrapping to the first entry.
2. The high-order byte of each word of
the header should be set to zero;
otherwise, unexpected results can
occur. This is because 32 bits
participate in the comparison and
replacement actions but only 24
bits are used to address the trace
entry. Thus, a trace table may
wrap from high storage locations to
low storage locations, and, depend­
ing on high-order bit values, not
wrap to the intended beginning of
the table.
3. Because current trace information is placed in the location desig­
nated by the updated contents of
the current-entry-control word, the
entry designated before tracing
occurs is not used initially, although it may subsequently be used if it is in the range of the table after wrapping.
4. Implicit tracing of SET SECONDARY ASH while in the secondary-space
mode requires that the trace-table designation, CPU identity byte, trace-table-entry heDder, and trace table appear in the secondary space which is current when instruction
execution begins. TRACE ENTRY A trace entry consists of 32 bytes
beginning on a 32-byte boundary. The trace-entry address for the current instruction is formed from bits 8-26 of updated current-entry-control word
of the trace-table-entry header. It is treated as a logical address.
The store-type reference to a trace
entry is not necessarily a single-access reference. During the execution of an
implicitly traced instruction, another CPU or a channel may observe that an
entry, or portions of an entry, are
stored more than once. The intermediate
results observed mayor may not corre­
spond to the final results.
The format of an entry for the
instructions PROGRAM CALL, PROGRAM TRANSFER, and SET SECONDARY ASN is shown in the figure "Trace-Entry Formats."