Explanation (Continued): RA I/O-system reset is performed in all the channels in the configuration and
pending I/O-interruptionconditions are cleared. As part of this reset,
system reset is signaled to theI/O control units and devices attached to
the channels being reset.RC I/O-system reset is performed in those channels connected to the CPU per
forming the program reset or initial-program reset. As part ofthis reset,
system resetis signaled to the I/O control units and devices attached to
the channelsbeing reset. S The CPU is reset; current operations, if any, are terminated; the TlB is
cleared of entries; interruption conditions in theCPU are cleared; and the CPU ;s placed in the stopped state. The effect of performing the start
function is unpredictable when the stopped state has been entered by means
of a reset.
T TheTOD clock is initialized to zero and validated; it enters the not-set
state.U The state, condition, or contents of the field remain unchanged. However,
the result is unpredictable if an operation is in progress that changes the
state, condition, or contents of the field at the time of reset.U/V The contents remain unchanged, provided the field is not being changed at
the time the reset function is performed. However, on some models, the
checking-block code of the contents may be made valid. The result is un
predictable ifan operation is in progress that changes the contents of the
field at the time of reset.
Summary of Reset Actions(Part 2 of 2) CPU reset causes the following actions:
1. The execution of the current
instruction or other processing
sequence, suchas an interruption,
is terminated, and all program
interruption and supervisor-call
interruption conditions are
cleared.
2. Any pending external-interruption
conditions which are local tothe CPU are cleared. Floating
external-interruption conditions
are not cleared.
3. Anypending machine-cheek-interrup
tion conditions and error indi
cations which are local to theCPU and any check-stop states are
cleared. Floating machine-check
interruption conditions are not
cleared. Any machine-check condi
tionwhich is reported to all CPUs in the configuration and which has
been made pending toa CPU is said
to be local to theCPU. 4. All copies of prefetched
instructions or operandsare cleared. Additionally, any results
to be stored because of the
execution of instructions in the
current checkpoint interval are
cleared.
5. The translation-lookaside buffer is
cleared of entries.
6. TheCPU is placed in the stopped
state after actions 1-5 have been
completed. When theIPl sequence
follows the reset function on thatCPU, the CPU enters the load state
at the completion ofthe reset
functionand does not necessarily enter the stopped state during the
execution of the reset operation.
Registers, storage contents, and the
state of conditions external to theCPU remain unchanged by CPU reset. However,
the subsequent contents of the register,
location, or state are unpredictable if
an operation is in progress that changes
the contents at the time of the reset.
When the reset function in theCPU is
initiated at the time theCPU is execut
ing anI/O instruction or is performing
anI/O interruption, the current opera
tion between theCPU and the channel may
or may not be completed, and the result
ant state of the associated channel may
be unpredictable.Programming Note
Most operations which would change a
state, a condition, or the contents of aChapter 4. Control 4-33
pending I/O-interruption
system reset is signaled to the
the channels being reset.
forming the program reset or initial-program reset. As part of
system reset
the channels
cleared of entries; interruption conditions in the
function is unpredictable when the stopped state has been entered by means
of a reset.
T The
state.
the result is unpredictable if an operation is in progress that changes the
state, condition, or contents of the field at the time of reset.
the time the reset function is performed. However, on some models, the
checking-block code of the contents may be made valid. The result is un
predictable if
field at the time of reset.
Summary of Reset Actions
1. The execution of the current
instruction or other processing
sequence, such
is terminated, and all program
interruption and supervisor-call
interruption conditions are
cleared.
2. Any pending external-interruption
conditions which are local to
external-interruption conditions
are not cleared.
3. Any
tion conditions and error indi
cations which are local to the
cleared. Floating machine-check
interruption conditions are not
cleared. Any machine-check condi
tion
been made pending to
to be local to the
instructions or operands
to be stored because of the
execution of instructions in the
current checkpoint interval are
cleared.
5. The translation-lookaside buffer is
cleared of entries.
6. The
state after actions 1-5 have been
completed. When the
follows the reset function on that
at the completion of
function
execution of the reset operation.
Registers, storage contents, and the
state of conditions external to the
the subsequent contents of the register,
location, or state are unpredictable if
an operation is in progress that changes
the contents at the time of the reset.
When the reset function in the
initiated at the time the
ing an
an
tion between the
or may not be completed, and the result
ant state of the associated channel may
be unpredictable.
Most operations which would change a
state, a condition, or the contents of a