found by comparing the priority numbers,
as found in the figure, from left to right until a mismatch is found. If the first inequality is between numeric
characters, either the two conditions
are mutually exclusive or, if both can
occur, the condition with the smaller
number is indicated. If the first
inequality is between alphabetic charac­
ters, then the two conditions are not
exclusive, and it is unpredictable which
is indicated when both occur.
To understand the use of the table, consider an example involving the
instruction ADD DECIMAL, which is a
six-byte instruction. Assume that the
first four bytes of the instruction can
be accessed but that the instruction
crosses a boundary so that an addressing
exception exists for the last two bytes.
Additionally, assume that the first
operand addressed by the instruction
contains invalid decimal digits and is
in a location that can be fetched from,
but not stored into, because of key­
controlled protection. The three
exceptions which could result from
attempted execution of the ADD DECIMAL are: Priority
Number Exception
7.B Access exceptions for third
instruction halfword.
8.B Access exceptions (operand
1) • 8.D Data exception. Since the first inequality (7*8) is
between numeric characters, the address­
ing exception would be indicated. If,
however, the entire ADD DECIMAL instruc­
tion can be fetched, and only the second
two exceptions listed above exist, then the inequality (B*D) is between alpha­
bet i c characters, and it. is
unpredictable whether the protection
exception or the data exception would be
indicated. Chapter 6. Interruptions 6-31

1.A
1.B
2.1
2.2
3.
4.
S.
6.
7.A
7.B 7.C.l 7.C.2 7.C.3 7.C.4 7.C.S 7.D B.A 8.D B.E 9.
Delayed addressing exception due to an attempted store by a previous
instruction (zero ILC). Delayed protection exception due to an attempted store by a previous
instruction (zero ILC). Specification exception due to any PSW error of the type that causes an
immediate interruption.
l Specification exception due to an odd instruction address in the PSW. Access exceptions for first halfword of EXECUTE.2 Access exceptions for second halfword of EXECUTE.2 Specification exception due to target instruction of EXECUTE not being
specified on halfword boundary.2
Access exceptions for first instruction halfword.
Access exceptions for second instruction halfword.
3
Access exceptions for third instruction halfword.
3
Vector-operation exception.
Operation exception.
Privileged-operation exception for privileged instructions.
Execute exception.
Special-operation exception.
Specification exception caused by an uninstalled instruction that has an
assigned operation code (for example, an uninstalled floating-point in­
struction designating an odd floating-point register). Specification exception due to conditions other than those included in
2, 5, and 7.D above.
Access exceptions for an access to an operand in storage.
s
Access exceptions for any other access to an operand in storage.
s
Data exception.
6
Decimal-divide exception.' Events other than PER events, exceptions which result in completion,
and the following exceptions: fixed-point divide, floating-point divide, and unnormalized operand. Either these exceptions and events are mutu­
ally exclusive or their priority is specified in the corresponding definitions. Priority of Program-Interruption Conditions (Part 1 of 2)
6-32 System/370 Principles of Operation