MULTIPLY MER R t ,R
2
o
[RR, Short Multiplier and Multiplicand,
Long Product] , 3C' I R t I R:z
8 12 15
ME R"D 2 (X 2 ,B:z) o
[RX, Short Multiplier and Multiplicand,
Long Product]
'7C'
8 12 16 20 31
MDR [RR, Long Operands] , 2C' I R t I R:z
o 8 12 15
MD [RX, Long Operands] '6C'
o 8 12 16 20 31
MXDR Rt,R:z
o
[RR, Long Multiplier and Multiplicand,
Extended Product]
'27' I R t I R:z I 8 12 15
MXD R t ,D:z(X
2 ,B:z) o
[RX, Long Multiplier and Multiplicand,
Extended Product]
'67'
8 12 16 20 31
MXR R t ,R
2
[RR, Extended Operands] , 26 ' I R t I R:z I o 8 12 15
The normalized product of the second
operand (the multiplier) and the first
operand (the multiplicand) is placed at
the first-operand location.
Multiplication of two floating-point
numbers consists in exponent addition
and fraction multiplication. The oper­
ands are first normalized to eliminate
leading hexadecimal zeros. The sum of
the characteristics of the normalized
operands, less 64, is used as the char­
acteristic of the intermediate product.
The fraction of the intermediate product
is the exact product of the normalized
operand fractions. When the
intermediate-product fraction has one
leading hexadecimal zero digit, the
fraction is shifted left one digit posi­
tion, bringing the contents of the
guard-digit position into the rightmost
position of the result fraction, and the
intermediate-product characteristic is
reduced by one. The fraction is then
truncated to the proper result-fraction
length.
For MER and ME, the and
multiplicand fractions have six hexade­
cimal digits; the product fraction has
the full 14 digits of the long format,
with the two rightmost fraction digits
always zeros. For MDR and MD, the
multiplier and multiplicand fractions
have 14 digits, and the final product
fraction is truncated to 14 digits. For
MXDR and MXD, the multiplier and multi­
plicand fractions have 14 digits, with
the multiplicand occupying the high­
order part of the first operand; the
final product fraction contains 28
digits and is an exact product of the
operand fractions. For MXR, the multi­
plier and multiplicand fractions have 28
digits, and the final product fraction
is truncated to 28 digits.
An exponent-overflow exception is recog­
nized when the characteristic of the
final product would exceed 127 and the
fraction is not zero. The operation is
completed by making the characteristic
128 less than the correct value. If,
for extended results, the low-order
characteristic would also exceed 127,
it, too, is decreased by 128. The
result is normalized, and the sign and
fraction remain correct. A program
interruption for exponent overflow
occurs.
Exponent overflow is not recognized when
the intermediate-product characteristic
is initially 128 but is brought back
within range by normalization.
An exponent-underflow exception exists
when the characteristic of the final
product would be less than zero and the
fraction is not zero. If the exponent­
underflow mask bit is one, the operation
is completed by making the character­
istic 128 greater than the correct
value, and a program interruption for
exponent underflow occurs. The result
is normalized, and the sign and fraction
remain correct. If the exponent-
Chapter 9. Floating-Point Instructions 9-13

underflow mask bit is zero, program
interruption does not take place;
instead, the operation is completed by
making the product a true zero. For
extended results, exponent underflow is
not recognized when the low-order char­
acteristic would be less than zero but
the high-order characteristic is equal
to or greater than zero. Exponent underflow does not occur when
the characteristic of an operand becomes
less than zero during normalization of
the operands, as long as the final prod­
uct can be represented with the correct
characteristic.
When either or both operand fractions
are zero, the result is made a true zero, and no exponent overflow or expo­
nent underflow occurs.
The sign of the product is determined by
the rules of algebra, except that the
sign is always zero when the result is
made a true zero.
The R
t field for MER, ME, MDR, and MD,
and the R2 field for MER, MDR, and MXDR
must designate register 0, 2, 4, or 6.
The Rl field for MXDR, MXD, and MXR, and
the R2 field for MXR must designate
register 0 or 4. Otherwise, a specifi­
cation exception is recognized.
Condition Code:
unchanged.
The code remains Program Exceptions:
Access (fetch, operand 2 of ME, MD, and MXD only)
Exponent overflow
Exponent underflow Operation (if the floating-point
facility is not installed, or,
for MXDR, MXD, and MXR, if the
extended-precision floating-
point facility is not
installed)
Specification Programming Notes
1. An example of the use of the MULTI­ PLY instruction is given in Appen­
dix A.
2. Interchanging the two operands in a
floating-point multiplication does
not affect the value of the
product.
9-14 System/370 Principles of Operation STORE o 8 12 16 20 31 STD [RX, Long Operands] '60' o 8 12 16 20 31
The first operand is placed unchanged at
the second-operand location.
The Rt field must designate register 0, 2, 4, or 6; otherwise, a specification
exception is recognized.
Condition Code:
unchanged.
The code remains Program Exceptions:
Access (store, operand 2) Operation (if the floating-point
facility is not installed)
Specification
SUBTRACT NORMALIZED SER R t , R2 [RR, Short Operands]
'3B' I R t I R2 0 8 12 15
SE R p D
2
(X
2
,B
2
) [RX, Short Operands]
'7B'
o 8 12 16 20 31
SDR [RR, Long Operands]
'2B'
o 8 12 15
SD [RX, Long Operands]
'6B'
o 8 12 16 20 31