1. The validity of the information
loaded into a control register,
including that pertaining to dynam
ic address translation, is not
checked at the time the register is
loaded. This information is
checked and the program exception,
if any, is indicated at the time
the information is used.
2. The information pertaining to
dynamic address translation is
considered to be used when an
instruction is executed withOAT on
or when INVALIDATEPAGE TABLE ENTRY or lOAD REAL ADDRESS is executed.
The information is not considered
to be used when thePSW specifies
translation but anI/O, external,
restart, or machine-check inter
ruption occurs before an instruc
tion is executed, or when thePSW specifies the wait state. TRANSLATION TABLES The translation process consists in a
two-level lookup using two tables: a
segment table anda page table. These
tables reside in real storage.
Segment-Table Entries
The entry fetched from the segment table
has the following format:IPTl 10000 1 Page-Table Origin 048 29 31
The fields in the segment-table entry
are allocated as follows:Page-Table Length (PTl): Bits 0-3 spec
ify the length of the page table in
increments that are equal to 1/16 of the
maximum size of the table, the maximum
size depending on the size of segments
and pages. The length of the page
table, in units 1/16 of the maXlmum
size, is one more than thePTl value.
The length field is compared against the
leftmost four bits of the page-index
portion of the virtual address to deter
mine whether the page index designates
an entry within the page table.Page-Table Origin: Bits 8-28, with
three zeros appended on the right, forma 24-bit real address that designates
the beginning of a page table. With
extended real addressing, the page-table
origin is still a 24-bit real address
and is extended on the left with zeros.Segment-Protection Bit (f): Bit 29,
with the segment-protection facility
installed, controls whether store
accesses can be made in the segment.
This protection mechanism is in addition
to the key-controlled-protection and
low-address-protection mechanisms. The
bit has no effect on fetch accesses. If
the bit is zero, stores are permitted to
the segment, subject to the other
protection mechanisms. If the bit is
one, stores are disallowed. An attempt
to store when the segment-protection bit
is one causes a protection exception to
be recognized.
Common-Segment Bit Bit 30, with
the common-segment facility installed,
controls the use of translation
lookaside-buffer (TlB) copies of the
segment-table entry and of the page
table which it designates. A zero iden
tifies a private segment; in this case,
the segment-table entry and the page
table it designates may be used only in
association with the segment-table
origin that designates the segment table
in which the segment-table entry
resides.A one identifies a common
segment; in this case, the segment-table
entry and the page table it designates
may continue tobe used for translating
addresses corresponding to the segment
index, even though a different segment
table is specified. In some models, bit30 in the segment-table entry is
ignored, and all segments are treated as
private.
The common-segment bit is used only for
controlling the loading and use of TLB
copies. When the common-segment facili
ty is installed, the common-segment bit
is ignored for explicit translation and
for implicit translation not using the
TLB.
Segment-Invalid Bit (1): Bit 31
controls whether the segment associated
with the segment-table entry is avail
able. When the bit is zero, address
translation proceeds by using the desig
nated page table. When the bit isa one, the segment-table entry cannot be
used for translation.
The handling of bit positions 4-7 and29-30 of the segment-table entry depends
on the model. Normally a translation
specification exceptionis recognized
when these bits are not zeros; however,
on some models the contents of these bit
positions maybe ignored.On machines
with the segment-protection facility
installed, bit 29 is interpretedas the
segment-protection bit.On machines
with the common-segment facility
installed,bit 30 is interpreted as
defined or is ignored.
Chapter 3.Storage 3-25
loaded into a control register,
including that pertaining to dynam
ic address translation, is not
checked at the time the register is
loaded. This information is
checked and the program exception,
if any, is indicated at the time
the information is used.
2. The information pertaining to
dynamic address translation is
considered to be used when an
instruction is executed with
or when INVALIDATE
The information is not considered
to be used when the
translation but an
restart, or machine-check inter
ruption occurs before an instruc
tion is executed, or when the
two-level lookup using two tables: a
segment table and
tables reside in real storage.
Segment-Table Entries
The entry fetched from the segment table
has the following format:
The fields in the segment-table entry
are allocated as follows:
ify the length of the page table in
increments that are equal to 1/16 of the
maximum size of the table, the maximum
size depending on the size of segments
and pages. The length of the page
table, in units 1/16 of the maXlmum
size, is one more than the
The length field is compared against the
leftmost four bits of the page-index
portion of the virtual address to deter
mine whether the page index designates
an entry within the page table.
three zeros appended on the right, form
the beginning of a page table. With
extended real addressing, the page-table
origin is still a 24-bit real address
and is extended on the left with zeros.
with the segment-protection facility
installed, controls whether store
accesses can be made in the segment.
This protection mechanism is in addition
to the key-controlled-protection and
low-address-protection mechanisms. The
bit has no effect on fetch accesses. If
the bit is zero, stores are permitted to
the segment, subject to the other
protection mechanisms. If the bit is
one, stores are disallowed. An attempt
to store when the segment-protection bit
is one causes a protection exception to
be recognized.
Common-Segment Bit
the common-segment facility installed,
controls the use of translation
lookaside-buffer (TlB) copies of the
segment-table entry and of the page
table which it designates. A zero iden
tifies a private segment; in this case,
the segment-table entry and the page
table it designates may be used only in
association with the segment-table
origin that designates the segment table
in which the segment-table entry
resides.
segment; in this case, the segment-table
entry and the page table it designates
may continue to
addresses corresponding to the segment
index, even though a different segment
table is specified. In some models, bit
ignored, and all segments are treated as
private.
The common-segment bit is used only for
controlling the loading and use of TLB
copies. When the common-segment facili
ty is installed, the common-segment bit
is ignored for explicit translation and
for implicit translation not using the
TLB.
Segment-Invalid Bit (1): Bit 31
controls whether the segment associated
with the segment-table entry is avail
able. When the bit is zero, address
translation proceeds by using the desig
nated page table. When the bit is
used for translation.
The handling of bit positions 4-7 and
on the model. Normally a translation
specification exception
when these bits are not zeros; however,
on some models the contents of these bit
positions maybe ignored.
with the segment-protection facility
installed, bit 29 is interpreted
segment-protection bit.
with the common-segment facility
installed,
defined or is ignored.
Chapter 3.